u-boot/configs/sifive_unleashed_defconfig

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CONFIG_RISCV=y
CONFIG_SYS_MALLOC_LEN=0x800000
CONFIG_SYS_MALLOC_F_LEN=0x3000
CONFIG_SPL_GPIO=y
CONFIG_NR_DRAM_BANKS=1
CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80200000
spi: Enable missing CONFIG_SPL_DM_SPI support Due to how the Makefile logic is we currently get DM_SPI support in SPL enabled by having DM_SPI enabled for full U-Boot but not having CONFIG_SPL_DM_SPI set. Add this missing option to boards that were inadvertently making use of it. Cc: Adam Ford <aford173@gmail.com> Cc: Akash Gajjar <akash@openedev.com> Cc: Anatolij Gustschin <agust@denx.de> Cc: Andy Yan <andy.yan@rock-chips.com> Cc: Anup Patel <anup.patel@wdc.com> Cc: Atish Patra <atish.patra@wdc.com> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Chee Hong Ang <chee.hong.ang@intel.com> Cc: Chin-Liang See <clsee@altera.com> Cc: Dalon Westergreen <dwesterg@gmail.com> Cc: Dinh Nguyen <dinguyen@kernel.org> Cc: Eugen Hristev <eugen.hristev@microchip.com> Cc: Hannes Schmelzer <hannes.schmelzer@br-automation.com> Cc: Heiko Schocher <hs@denx.de> Cc: Jagan Teki <jagan@amarulasolutions.com> Cc: Klaus Goger <klaus.goger@theobroma-systems.com> Cc: Levin Du <djw@t-chip.com.cn> Cc: Ley Foon Tan <ley.foon.tan@intel.com> Cc: Lokesh Vutla <lokeshvutla@ti.com> Cc: Luca Ceresoli <luca@lucaceresoli.net> Cc: Marek Vasut <marex@denx.de> Cc: Michal Simek <monstr@monstr.eu> Cc: Mike Looijmans <mike.looijmans@topic.nl> Cc: Nicolas Ferre <nicolas.ferre@microchip.com> Cc: Nikita Kiryanov <nikita@compulab.co.il> Cc: Palmer Dabbelt <palmer@dabbelt.com> Cc: Patrick Delaunay <patrick.delaunay@st.com> Cc: Paul Walmsley <paul.walmsley@sifive.com> Cc: Pavel Machek <pavel@denx.de> Cc: Peter Robinson <pbrobinson@gmail.com> Cc: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Cc: Simon Glass <sjg@chromium.org> Cc: Stefan Roese <sr@denx.de> Cc: Suniel Mahesh <sunil@amarulasolutions.com> Cc: Vitaly Andrianov <vitalya@ti.com> Cc: Wolfgang Grandegger <wg@aries-embedded.de> Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Luca Ceresoli <luca@lucaceresoli.net>
2020-06-16 23:06:29 +00:00
CONFIG_SPL_DM_SPI=y
CONFIG_DEFAULT_DEVICE_TREE="hifive-unleashed-a00"
CONFIG_DM_RESET=y
CONFIG_SPL_MMC=y
CONFIG_SPL_STACK=0x81cfe70
CONFIG_SPL=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y
CONFIG_SPL_SPI=y
CONFIG_SYS_LOAD_ADDR=0x80200000
CONFIG_TARGET_SIFIVE_UNLEASHED=y
CONFIG_ARCH_RV64I=y
CONFIG_RISCV_SMODE=y
CONFIG_FIT=y
CONFIG_SPL_LOAD_FIT_ADDRESS=0x84000000
CONFIG_DISTRO_DEFAULTS=y
CONFIG_USE_PREBOOT=y
CONFIG_PREBOOT="setenv fdt_addr ${fdtcontroladdr};fdt addr ${fdtcontroladdr};"
CONFIG_DEFAULT_FDT_FILE="sifive/hifive-unleashed-a00.dtb"
CONFIG_DISPLAY_CPUINFO=y
CONFIG_DISPLAY_BOARDINFO=y
CONFIG_MISC_INIT_R=y
CONFIG_SPL_MAX_SIZE=0x100000
CONFIG_SPL_BSS_START_ADDR=0x85000000
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
CONFIG_SYS_SPL_MALLOC=y
CONFIG_SPL_DM_SPI_FLASH=y
CONFIG_SPL_DM_RESET=y
CONFIG_SPL_SPI_LOAD=y
CONFIG_SYS_CBSIZE=256
CONFIG_SYS_PBSIZE=276
CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_SPL_CLK=y
CONFIG_DM_MTD=y