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u-boot/arch/arm/mach-rockchip/px30/Kconfig

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rockchip: add px30 architecture core Add core architecture code to support the px30 soc. This includes a separate tpl board file due to very limited sram size as well as a non-dm sdram driver, as this also has to fit into the tiny sram. Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-07-16 20:18:21 +00:00
if ROCKCHIP_PX30
config TARGET_EVB_PX30
bool "EVB_PX30"
rockchip: px30: Add EVB_PX30 Kconfig help TARGET_EVB_PX30 can be possible to use other px30 boards. Add the help text for existing EVB, so-that the new boards which are resuing this config option can mention their board help text. This would help to track which boards are using EVB_PX30 config. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-10-28 13:33:43 +00:00
help
This target config option used for below listed px30 boards.
EVB_PX30:
* EVB_PX30 is an evaluation board for Rockchip PX30.
rockchip: add px30 architecture core Add core architecture code to support the px30 soc. This includes a separate tpl board file due to very limited sram size as well as a non-dm sdram driver, as this also has to fit into the tiny sram. Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-07-16 20:18:21 +00:00
rockchip: board: add Hardkernel Odroid Go2 board Also known as Odroid Go Advance but named Go2 internally by the vendor it seems. Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-07-01 09:28:42 +00:00
config TARGET_ODROID_GO2
bool "ODROID_GO2"
rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam. EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive Evaluation Board from Engicam. PX30.Core needs to mount on top of this Evaluation board for creating complete PX30.Core EDIMM2.2 Starter Kit. Add support for it. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com> Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
2020-10-28 13:33:45 +00:00
config TARGET_PX30_CORE
bool "Engicam PX30.Core"
help
PX30.Core EDIMM2.2:
* PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.
* EDIMM2.2 is a Form Factor Capacitive Evaluation Board from Engicam.
* PX30.Core needs to mount on top of EDIMM2.2 for creating complete
PX30.Core EDIMM2.2 Starter Kit.
rockchip: Add Engicam PX30.Core C.TOUCH 2.0 PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam. C.TOUCH 2.0 is a general purpose carrier board with capacitive touch interface support. PX30.Core needs to mount on top of this Carrier board for creating complete PX30.Core C.TOUCH 2.0 board. Add support for it. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com> Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
2020-10-28 13:33:47 +00:00
PX30.Core CTOUCH2:
* PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.
* CTOUCH2.0 is a general purpose Carrier board with capacitive
touch interface support.
* PX30.Core needs to mount on top of CTOUCH2.0 for creating complete
PX30.Core C.TOUCH Carrier board.
engicam: px30: Add Engicam PX30.Core C.TOUCH 2.0 10.1" OF PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam. C.TOUCH 2.0 is a general purpose carrier board with capacitive touch interface support. 10.1" OF is a capacitive touch 10.1" Open Frame panel solutions. PX30.Core needs to mount on top of C.TOUCH 2.0 carrier with pluged 10.1" OF for creating complete PX30.Core C.TOUCH 2.0 10.1" Open Frame. Add support for it. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2021-11-15 17:38:21 +00:00
PX30.Core CTOUCH2-OF10:
* PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.
* CTOUCH2.0 is a general purpose Carrier board with capacitive
touch interface support.
* 10.1" OF is a capacitive touch 10.1" Open Frame panel solutions.
* PX30.Core needs to mount on top of C.TOUCH 2.0 carrier with pluged
10.1" OF for creating complete PX30.Core C.TOUCH 2.0 10.1" Open Frame.
rockchip: add support for PX30 Ringneck SoM on Haikou Devkit The PX30-µQ7 (Ringneck) is a system-on-module featuring the Rockchip PX30 in a micro Qseven-compatible form-factor. PX30-µQ7 features: * CPU: quad-core Cortex-A35 * DRAM: 2GB dual-channel * eMMC: onboard eMMC * SD/MMC * TI DP83825I 10/100Mbps PHY * USB: * USB2.0 dual role port * 3x USB2.0 host via onboard USB2.0 hub * Display: MIPI-DSI * Camera: MIPI-CSI * onboard 2.4GHz WiFi + Bluetooth module * Companion Controller: on-board additional microcontroller (STM32 Cortex-M0 or ATtiny): * RTC * fan controller * CAN (only STM32) The non-U-Boot DTS files are imported from Linux v6.2-rc2. Cc: Quentin Schulz <foss+uboot@0leil.net> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
2023-01-09 10:36:45 +00:00
config TARGET_RINGNECK_PX30
bool "Theobroma Systems PX30-µQ7 (Ringneck)"
help
The PX30-uQ7 (Ringneck) SoM is a µQseven-compatible (40mmx70mm,
MXM-230 connector) system-on-module from Theobroma Systems[1],
featuring the Rockchip PX30.
It provides the following feature set:
* up to 4GB DDR4
* up to 128GB on-module eMMC (with 8-bit 1.8V interface)
* SD card (on a baseboard) via edge connector
* Fast Ethernet with on-module TI DP83825I PHY
* MIPI-DSI/LVDS
* MIPI-CSI
* USB
- 1x USB 2.0 dual-role
- 3x USB 2.0 host
* on-module companion controller (STM32 Cortex-M0 or ATtiny), implementing:
- low-power RTC functionality (ISL1208 emulation)
- fan controller (AMC6821 emulation)
- USB<->CAN bridge controller (STM32 only)
* on-module Espressif ESP32 for Bluetooth + 2.4GHz WiFi
* on-module NXP SE05x Secure Element
rockchip: add px30 architecture core Add core architecture code to support the px30 soc. This includes a separate tpl board file due to very limited sram size as well as a non-dm sdram driver, as this also has to fit into the tiny sram. Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-07-16 20:18:21 +00:00
config ROCKCHIP_BOOT_MODE_REG
default 0xff010200
rockchip: move ROCKCHIP_STIMER_BASE to Kconfig Move ROCKCHIP_STIMER_BASE to Kconfig. Signed-off-by: Johan Jonker <jbx6244@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-04-09 16:55:02 +00:00
config ROCKCHIP_STIMER_BASE
default 0xff220020
rockchip: add px30 architecture core Add core architecture code to support the px30 soc. This includes a separate tpl board file due to very limited sram size as well as a non-dm sdram driver, as this also has to fit into the tiny sram. Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-07-16 20:18:21 +00:00
config SYS_SOC
default "px30"
config SYS_MALLOC_F_LEN
default 0x400
serial: Rename SERIAL_SUPPORT to SERIAL Rename these options so that CONFIG_IS_ENABLED can be used with them. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-08-08 18:20:12 +00:00
config SPL_SERIAL
rockchip: add px30 architecture core Add core architecture code to support the px30 soc. This includes a separate tpl board file due to very limited sram size as well as a non-dm sdram driver, as this also has to fit into the tiny sram. Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-07-16 20:18:21 +00:00
default y
config TPL_LDSCRIPT
default "arch/arm/mach-rockchip/u-boot-tpl-v8.lds"
config TPL_TEXT_BASE
default 0xff0e1000
config TPL_STACK
default 0xff0e4fff
rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL UART3 also has two sets of pins that can be selected. Rename the config option to a common name, to allow it to be used for both UART2 and UART3. Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-28 14:27:51 +00:00
config DEBUG_UART_CHANNEL
int "Mux channel to use for debug UART2/UART3"
rockchip: add px30 architecture core Add core architecture code to support the px30 soc. This includes a separate tpl board file due to very limited sram size as well as a non-dm sdram driver, as this also has to fit into the tiny sram. Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-07-16 20:18:21 +00:00
depends on DEBUG_UART_BOARD_INIT
default 0
help
rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL UART3 also has two sets of pins that can be selected. Rename the config option to a common name, to allow it to be used for both UART2 and UART3. Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-28 14:27:51 +00:00
UART2 and UART3 can use two different set of pins to route the output.
rockchip: add px30 architecture core Add core architecture code to support the px30 soc. This includes a separate tpl board file due to very limited sram size as well as a non-dm sdram driver, as this also has to fit into the tiny sram. Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-07-16 20:18:21 +00:00
For using the UART for early debugging the route to use needs
to be declared (0 or 1).
rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam. EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive Evaluation Board from Engicam. PX30.Core needs to mount on top of this Evaluation board for creating complete PX30.Core EDIMM2.2 Starter Kit. Add support for it. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com> Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
2020-10-28 13:33:45 +00:00
source "board/engicam/px30_core/Kconfig"
rockchip: board: add Hardkernel Odroid Go2 board Also known as Odroid Go Advance but named Go2 internally by the vendor it seems. Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-07-01 09:28:42 +00:00
source "board/hardkernel/odroid_go2/Kconfig"
rockchip: add px30 architecture core Add core architecture code to support the px30 soc. This includes a separate tpl board file due to very limited sram size as well as a non-dm sdram driver, as this also has to fit into the tiny sram. Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-07-16 20:18:21 +00:00
source "board/rockchip/evb_px30/Kconfig"
rockchip: add support for PX30 Ringneck SoM on Haikou Devkit The PX30-µQ7 (Ringneck) is a system-on-module featuring the Rockchip PX30 in a micro Qseven-compatible form-factor. PX30-µQ7 features: * CPU: quad-core Cortex-A35 * DRAM: 2GB dual-channel * eMMC: onboard eMMC * SD/MMC * TI DP83825I 10/100Mbps PHY * USB: * USB2.0 dual role port * 3x USB2.0 host via onboard USB2.0 hub * Display: MIPI-DSI * Camera: MIPI-CSI * onboard 2.4GHz WiFi + Bluetooth module * Companion Controller: on-board additional microcontroller (STM32 Cortex-M0 or ATtiny): * RTC * fan controller * CAN (only STM32) The non-U-Boot DTS files are imported from Linux v6.2-rc2. Cc: Quentin Schulz <foss+uboot@0leil.net> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
2023-01-09 10:36:45 +00:00
source "board/theobroma-systems/ringneck_px30/Kconfig"
rockchip: add px30 architecture core Add core architecture code to support the px30 soc. This includes a separate tpl board file due to very limited sram size as well as a non-dm sdram driver, as this also has to fit into the tiny sram. Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-07-16 20:18:21 +00:00
endif
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