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u-boot/arch/arm/mach-rockchip/px30/Kconfig

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rockchip: add px30 architecture core Add core architecture code to support the px30 soc. This includes a separate tpl board file due to very limited sram size as well as a non-dm sdram driver, as this also has to fit into the tiny sram. Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-07-16 20:18:21 +00:00
if ROCKCHIP_PX30
config TARGET_EVB_PX30
bool "EVB_PX30"
rockchip: board: add Hardkernel Odroid Go2 board Also known as Odroid Go Advance but named Go2 internally by the vendor it seems. Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-07-01 09:28:42 +00:00
config TARGET_ODROID_GO2
bool "ODROID_GO2"
rockchip: add px30 architecture core Add core architecture code to support the px30 soc. This includes a separate tpl board file due to very limited sram size as well as a non-dm sdram driver, as this also has to fit into the tiny sram. Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-07-16 20:18:21 +00:00
config ROCKCHIP_BOOT_MODE_REG
default 0xff010200
config SYS_SOC
default "px30"
config SYS_MALLOC_F_LEN
default 0x400
config SPL_SERIAL_SUPPORT
default y
config TPL_LDSCRIPT
default "arch/arm/mach-rockchip/u-boot-tpl-v8.lds"
config TPL_TEXT_BASE
default 0xff0e1000
config TPL_MAX_SIZE
default 10240
config TPL_STACK
default 0xff0e4fff
rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL UART3 also has two sets of pins that can be selected. Rename the config option to a common name, to allow it to be used for both UART2 and UART3. Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-28 14:27:51 +00:00
config DEBUG_UART_CHANNEL
int "Mux channel to use for debug UART2/UART3"
rockchip: add px30 architecture core Add core architecture code to support the px30 soc. This includes a separate tpl board file due to very limited sram size as well as a non-dm sdram driver, as this also has to fit into the tiny sram. Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-07-16 20:18:21 +00:00
depends on DEBUG_UART_BOARD_INIT
default 0
help
rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL UART3 also has two sets of pins that can be selected. Rename the config option to a common name, to allow it to be used for both UART2 and UART3. Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-28 14:27:51 +00:00
UART2 and UART3 can use two different set of pins to route the output.
rockchip: add px30 architecture core Add core architecture code to support the px30 soc. This includes a separate tpl board file due to very limited sram size as well as a non-dm sdram driver, as this also has to fit into the tiny sram. Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-07-16 20:18:21 +00:00
For using the UART for early debugging the route to use needs
to be declared (0 or 1).
rockchip: board: add Hardkernel Odroid Go2 board Also known as Odroid Go Advance but named Go2 internally by the vendor it seems. Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-07-01 09:28:42 +00:00
source "board/hardkernel/odroid_go2/Kconfig"
rockchip: add px30 architecture core Add core architecture code to support the px30 soc. This includes a separate tpl board file due to very limited sram size as well as a non-dm sdram driver, as this also has to fit into the tiny sram. Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-07-16 20:18:21 +00:00
source "board/rockchip/evb_px30/Kconfig"
endif
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