2017-03-26 19:09:55 +00:00
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CONFIG_ARM=y
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2021-08-28 01:18:30 +00:00
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CONFIG_SKIP_LOWLEVEL_INIT_ONLY=y
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CONFIG_SPL_SKIP_LOWLEVEL_INIT_ONLY=y
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2017-03-26 19:09:55 +00:00
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# CONFIG_SPL_USE_ARCH_MEMCPY is not set
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# CONFIG_SPL_USE_ARCH_MEMSET is not set
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CONFIG_ARCH_ROCKCHIP=y
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2018-02-03 17:10:38 +00:00
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CONFIG_SYS_TEXT_BASE=0x60000000
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2017-03-26 19:09:55 +00:00
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CONFIG_SYS_MALLOC_F_LEN=0x2000
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2020-08-10 19:31:07 +00:00
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CONFIG_NR_DRAM_BANKS=1
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2020-01-22 18:38:00 +00:00
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CONFIG_ENV_OFFSET=0x3F8000
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2021-06-28 14:17:29 +00:00
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CONFIG_DEFAULT_DEVICE_TREE="rk3188-radxarock"
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2020-07-06 17:54:25 +00:00
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CONFIG_SPL_TEXT_BASE=0x10080800
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2017-03-26 19:09:55 +00:00
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CONFIG_ROCKCHIP_RK3188=y
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2022-04-09 16:55:02 +00:00
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# CONFIG_ROCKCHIP_STIMER is not set
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2017-03-26 19:09:55 +00:00
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CONFIG_TARGET_ROCK=y
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2019-04-29 19:54:04 +00:00
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CONFIG_SPL_STACK_R_ADDR=0x60080000
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2018-06-04 15:57:37 +00:00
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|
CONFIG_DEBUG_UART_BASE=0x20064000
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CONFIG_DEBUG_UART_CLOCK=24000000
|
2021-08-23 14:25:31 +00:00
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CONFIG_SYS_LOAD_ADDR=0x60800800
|
2022-04-08 17:36:51 +00:00
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|
|
CONFIG_DEBUG_UART=y
|
2022-05-25 16:16:03 +00:00
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|
CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
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|
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CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x60100000
|
2019-07-21 02:51:14 +00:00
|
|
|
CONFIG_USE_PREBOOT=y
|
2018-05-25 21:45:05 +00:00
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|
|
CONFIG_DEFAULT_FDT_FILE="rk3188-radxarock.dtb"
|
2017-03-26 19:09:55 +00:00
|
|
|
# CONFIG_DISPLAY_CPUINFO is not set
|
2018-03-28 12:38:17 +00:00
|
|
|
CONFIG_DISPLAY_BOARDINFO_LATE=y
|
2022-05-16 21:20:26 +00:00
|
|
|
CONFIG_SPL_MAX_SIZE=0x7800
|
|
|
|
CONFIG_SPL_PAD_TO=0x7f8000
|
2022-05-19 19:09:22 +00:00
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|
|
CONFIG_SPL_NO_BSS_LIMIT=y
|
2022-05-26 17:13:21 +00:00
|
|
|
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
|
|
|
|
CONFIG_SPL_STACK=0x10087fff
|
2017-03-26 19:09:55 +00:00
|
|
|
CONFIG_SPL_STACK_R=y
|
|
|
|
CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
|
2017-08-24 09:52:32 +00:00
|
|
|
CONFIG_RANDOM_UUID=y
|
2017-08-14 23:58:53 +00:00
|
|
|
CONFIG_CMD_I2C=y
|
2017-03-26 19:09:55 +00:00
|
|
|
CONFIG_CMD_MMC=y
|
|
|
|
CONFIG_CMD_SPI=y
|
|
|
|
# CONFIG_CMD_SETEXPR is not set
|
|
|
|
CONFIG_CMD_CACHE=y
|
|
|
|
CONFIG_CMD_TIME=y
|
|
|
|
CONFIG_CMD_REGULATOR=y
|
|
|
|
CONFIG_SPL_OF_CONTROL=y
|
|
|
|
CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
|
|
|
|
CONFIG_SPL_OF_PLATDATA=y
|
2017-08-28 11:16:32 +00:00
|
|
|
CONFIG_ENV_IS_IN_MMC=y
|
2019-11-13 03:46:36 +00:00
|
|
|
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
|
2017-03-26 19:09:55 +00:00
|
|
|
CONFIG_REGMAP=y
|
|
|
|
CONFIG_SYSCON=y
|
|
|
|
# CONFIG_SPL_SIMPLE_BUS is not set
|
|
|
|
CONFIG_CLK=y
|
|
|
|
CONFIG_ROCKCHIP_GPIO=y
|
|
|
|
CONFIG_SYS_I2C_ROCKCHIP=y
|
|
|
|
CONFIG_LED=y
|
|
|
|
CONFIG_MMC_DW=y
|
|
|
|
CONFIG_MMC_DW_ROCKCHIP=y
|
2019-10-03 17:50:05 +00:00
|
|
|
CONFIG_MTD=y
|
2019-02-27 14:20:36 +00:00
|
|
|
CONFIG_SF_DEFAULT_SPEED=20000000
|
2017-03-26 19:09:55 +00:00
|
|
|
CONFIG_PINCTRL=y
|
|
|
|
CONFIG_DM_PMIC=y
|
|
|
|
# CONFIG_SPL_PMIC_CHILDREN is not set
|
|
|
|
CONFIG_PMIC_ACT8846=y
|
|
|
|
CONFIG_REGULATOR_ACT8846=y
|
|
|
|
CONFIG_DM_REGULATOR_FIXED=y
|
|
|
|
CONFIG_RAM=y
|
|
|
|
CONFIG_DEBUG_UART_SHIFT=2
|
2021-12-11 19:55:51 +00:00
|
|
|
CONFIG_ROCKCHIP_SERIAL=y
|
2017-03-26 19:09:55 +00:00
|
|
|
CONFIG_SYSRESET=y
|
2018-04-28 14:45:55 +00:00
|
|
|
CONFIG_TIMER=y
|
|
|
|
CONFIG_SPL_TIMER=y
|
|
|
|
CONFIG_ROCKCHIP_TIMER=y
|
2018-01-02 16:39:52 +00:00
|
|
|
CONFIG_USB=y
|
|
|
|
CONFIG_ROCKCHIP_USB2_PHY=y
|
2017-03-26 19:09:55 +00:00
|
|
|
CONFIG_SPL_TINY_MEMSET=y
|
|
|
|
CONFIG_CMD_DHRYSTONE=y
|
|
|
|
CONFIG_ERRNO_STR=y
|