2018-05-06 21:58:06 +00:00
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/* SPDX-License-Identifier: GPL-2.0+ */
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2012-12-13 20:49:12 +00:00
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/*
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* Copyright (c) 2012 The Chromium OS Authors.
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* (C) Copyright 2002-2010
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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*/
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#ifndef __ASM_GENERIC_GBL_DATA_H
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#define __ASM_GENERIC_GBL_DATA_H
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/*
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* The following data structure is placed in some memory which is
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* available very early after boot (like DPRAM on MPC8xx/MPC82xx, or
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* some locked parts of the data cache) to allow for a minimum set of
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* global variables during system initialization (until we have set
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* up the memory controller so that we can use RAM).
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*
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* Keep it *SMALL* and remember to set GENERATED_GBL_DATA_SIZE > sizeof(gd_t)
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*
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* Each architecture has its own private fields. For now all are private
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*/
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#ifndef __ASSEMBLY__
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2019-04-12 14:42:28 +00:00
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#include <fdtdec.h>
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2015-11-09 06:47:48 +00:00
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#include <membuff.h>
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2014-02-26 22:59:18 +00:00
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#include <linux/list.h>
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2012-12-13 20:49:12 +00:00
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typedef struct global_data {
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2020-02-24 17:22:27 +00:00
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struct bd_info *bd;
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2012-12-13 20:49:12 +00:00
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unsigned long flags;
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2013-03-05 14:40:05 +00:00
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unsigned int baudrate;
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2016-09-01 16:54:32 +00:00
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unsigned long cpu_clk; /* CPU clock in Hz! */
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2012-12-13 20:49:12 +00:00
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unsigned long bus_clk;
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/* We cannot bracket this with CONFIG_PCI due to mpc5xxx */
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unsigned long pci_clk;
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unsigned long mem_clk;
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2019-07-22 04:49:04 +00:00
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#if defined(CONFIG_LCD) || defined(CONFIG_VIDEO) || defined(CONFIG_DM_VIDEO)
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2016-09-01 16:54:32 +00:00
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unsigned long fb_base; /* Base address of framebuffer mem */
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2012-12-13 20:49:12 +00:00
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#endif
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2017-12-04 20:48:23 +00:00
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#if defined(CONFIG_POST)
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2016-09-01 16:54:32 +00:00
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unsigned long post_log_word; /* Record POST activities */
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unsigned long post_log_res; /* success of POST test */
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unsigned long post_init_f_time; /* When post_init_f started */
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2012-12-13 20:49:12 +00:00
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#endif
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#ifdef CONFIG_BOARD_TYPES
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unsigned long board_type;
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#endif
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unsigned long have_console; /* serial_init() was called */
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2016-10-18 02:12:36 +00:00
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#if CONFIG_IS_ENABLED(PRE_CONSOLE_BUFFER)
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2012-12-13 20:49:12 +00:00
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unsigned long precon_buf_idx; /* Pre-Console buffer index */
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#endif
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2016-09-01 16:54:32 +00:00
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unsigned long env_addr; /* Address of Environment struct */
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2017-08-03 18:21:56 +00:00
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unsigned long env_valid; /* Environment valid? enum env_valid */
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2018-01-23 20:16:59 +00:00
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unsigned long env_has_init; /* Bitmask of boolean of struct env_location offsets */
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2018-07-23 08:01:07 +00:00
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int env_load_prio; /* Priority of the loaded environment */
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2012-12-13 20:49:12 +00:00
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2018-06-11 19:07:09 +00:00
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unsigned long ram_base; /* Base address of RAM used by U-Boot */
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2016-09-01 16:54:32 +00:00
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unsigned long ram_top; /* Top address of RAM used by U-Boot */
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2012-12-13 20:49:12 +00:00
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unsigned long relocaddr; /* Start address of U-Boot in RAM */
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2016-09-01 16:54:32 +00:00
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phys_size_t ram_size; /* RAM size */
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unsigned long mon_len; /* monitor len */
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2012-12-13 20:49:12 +00:00
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unsigned long irq_sp; /* irq stack pointer */
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unsigned long start_addr_sp; /* start_addr_stackpointer */
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unsigned long reloc_off;
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struct global_data *new_gd; /* relocated global data */
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2014-02-26 22:59:18 +00:00
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#ifdef CONFIG_DM
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2014-07-23 12:55:04 +00:00
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struct udevice *dm_root; /* Root instance for Driver Model */
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struct udevice *dm_root_f; /* Pre-relocation root instance */
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2014-02-26 22:59:18 +00:00
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struct list_head uclass_root; /* Head of core tree */
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#endif
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2015-10-09 05:46:34 +00:00
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#ifdef CONFIG_TIMER
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2016-09-01 16:54:32 +00:00
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struct udevice *timer; /* Timer instance for Driver Model */
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2015-10-09 05:46:34 +00:00
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#endif
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2014-02-26 22:59:18 +00:00
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2016-09-01 16:54:32 +00:00
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const void *fdt_blob; /* Our device tree, NULL if none */
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void *new_fdt; /* Relocated FDT */
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unsigned long fdt_size; /* Space reserved for relocated FDT */
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2017-05-19 02:08:53 +00:00
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#ifdef CONFIG_OF_LIVE
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struct device_node *of_root;
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#endif
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2018-12-07 13:50:52 +00:00
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#if CONFIG_IS_ENABLED(MULTI_DTB_FIT)
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const void *multi_dtb_fit; /* uncompressed multi-dtb FIT image */
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#endif
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2015-01-26 22:22:54 +00:00
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struct jt_funcs *jt; /* jump table */
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2017-08-03 18:22:12 +00:00
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char env_buf[32]; /* buffer for env_get() before reloc. */
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2013-06-11 18:14:42 +00:00
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#ifdef CONFIG_TRACE
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void *trace_buff; /* The trace buffer */
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2012-01-16 21:12:23 +00:00
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#endif
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#if defined(CONFIG_SYS_I2C)
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int cur_i2c_bus; /* current used i2c bus */
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2013-06-11 18:14:42 +00:00
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#endif
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2017-05-09 02:32:03 +00:00
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unsigned int timebase_h;
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unsigned int timebase_l;
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2017-07-24 09:43:34 +00:00
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#if CONFIG_VAL(SYS_MALLOC_F_LEN)
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2014-07-11 04:23:28 +00:00
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unsigned long malloc_base; /* base address of early malloc() */
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unsigned long malloc_limit; /* limit address */
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unsigned long malloc_ptr; /* current address */
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2014-12-30 14:53:21 +00:00
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#endif
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#ifdef CONFIG_PCI
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struct pci_controller *hose; /* PCI hose for early use */
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2015-07-04 00:28:27 +00:00
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phys_addr_t pci_ram_top; /* top of region accessible to PCI */
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2014-12-30 14:53:21 +00:00
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#endif
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#ifdef CONFIG_PCI_BOOTDELAY
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int pcidelay_done;
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2014-07-11 04:23:28 +00:00
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#endif
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2014-11-11 01:00:20 +00:00
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struct udevice *cur_serial_dev; /* current serial device */
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2015-08-17 15:28:44 +00:00
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struct arch_global_data arch; /* architecture-specific data */
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2015-11-09 06:47:48 +00:00
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#ifdef CONFIG_CONSOLE_RECORD
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struct membuff console_out; /* console output */
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struct membuff console_in; /* console input */
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#endif
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2016-01-19 02:52:21 +00:00
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#ifdef CONFIG_DM_VIDEO
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ulong video_top; /* Top of video frame buffer area */
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ulong video_bottom; /* Bottom of video frame buffer area */
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#endif
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2017-05-22 11:05:25 +00:00
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#ifdef CONFIG_BOOTSTAGE
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struct bootstage_data *bootstage; /* Bootstage information */
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2017-05-22 11:05:30 +00:00
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struct bootstage_data *new_bootstage; /* Relocated bootstage info */
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2017-05-22 11:05:25 +00:00
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#endif
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2017-12-04 20:48:24 +00:00
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#ifdef CONFIG_LOG
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int log_drop_count; /* Number of dropped log messages */
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int default_log_level; /* For devices with no filters */
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struct list_head log_head; /* List of struct log_device */
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2017-12-28 20:14:17 +00:00
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int log_fmt; /* Mask containing log format info */
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2017-12-04 20:48:24 +00:00
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#endif
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2018-11-16 01:43:52 +00:00
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#if CONFIG_IS_ENABLED(BLOBLIST)
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struct bloblist_hdr *bloblist; /* Bloblist information */
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struct bloblist_hdr *new_bloblist; /* Relocated blolist info */
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2018-11-16 01:44:09 +00:00
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# ifdef CONFIG_SPL
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struct spl_handoff *spl_handoff;
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# endif
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2018-11-16 01:43:52 +00:00
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#endif
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2019-04-12 14:42:28 +00:00
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#if defined(CONFIG_TRANSLATION_OFFSET)
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fdt_addr_t translation_offset; /* optional translation offset */
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#endif
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2019-06-09 01:46:21 +00:00
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#if CONFIG_IS_ENABLED(WDT)
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2019-04-11 13:58:44 +00:00
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struct udevice *watchdog_dev;
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#endif
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2012-12-13 20:49:12 +00:00
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} gd_t;
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#endif
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2017-03-31 14:40:24 +00:00
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#ifdef CONFIG_BOARD_TYPES
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#define gd_board_type() gd->board_type
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#else
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#define gd_board_type() 0
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#endif
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2012-12-13 20:49:12 +00:00
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/*
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2019-08-16 12:45:29 +00:00
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* Global Data Flags
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2012-12-13 20:49:12 +00:00
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*/
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#define GD_FLG_RELOC 0x00001 /* Code was relocated to RAM */
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#define GD_FLG_DEVINIT 0x00002 /* Devices have been initialized */
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#define GD_FLG_SILENT 0x00004 /* Silent mode */
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#define GD_FLG_POSTFAIL 0x00008 /* Critical POST test failed */
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#define GD_FLG_POSTSTOP 0x00010 /* POST seqeunce aborted */
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#define GD_FLG_LOGINIT 0x00020 /* Log Buffer has been initialized */
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#define GD_FLG_DISABLE_CONSOLE 0x00040 /* Disable console (in & out) */
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#define GD_FLG_ENV_READY 0x00080 /* Env. imported into hash table */
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2014-07-23 12:55:07 +00:00
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#define GD_FLG_SERIAL_READY 0x00100 /* Pre-reloc serial console ready */
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2014-11-11 00:16:43 +00:00
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#define GD_FLG_FULL_MALLOC_INIT 0x00200 /* Full malloc() is ready */
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2015-06-23 21:39:10 +00:00
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#define GD_FLG_SPL_INIT 0x00400 /* spl_init() has been called */
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2016-09-01 16:54:32 +00:00
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#define GD_FLG_SKIP_RELOC 0x00800 /* Don't relocate */
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#define GD_FLG_RECORD 0x01000 /* Record console */
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#define GD_FLG_ENV_DEFAULT 0x02000 /* Default variable flag */
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2017-03-15 14:43:28 +00:00
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#define GD_FLG_SPL_EARLY_INIT 0x04000 /* Early SPL init is done */
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2017-12-04 20:48:28 +00:00
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#define GD_FLG_LOG_READY 0x08000 /* Log system is ready for use */
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2019-04-11 13:58:44 +00:00
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#define GD_FLG_WDT_READY 0x10000 /* Watchdog is ready for use */
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2020-04-26 15:12:57 +00:00
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#define GD_FLG_SKIP_LL_INIT 0x20000 /* Don't perform low-level init */
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2020-07-17 14:48:17 +00:00
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#define GD_FLG_SMP_READY 0x40000 /* SMP init is complete */
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2012-12-13 20:49:12 +00:00
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#endif /* __ASM_GENERIC_GBL_DATA_H */
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