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fdt: Add device tree memory bindings
Support a default memory bank, specified in reg, as well as board-specific memory banks in subtree board-id nodes. This allows memory information to be provided in the device tree, rather than hard-coded in, which will make it simpler to handle similar devices with different memory banks, as the board-id values or masks can be used to match devices. Signed-off-by: Michael Pratt <mpratt@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
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5 changed files with 224 additions and 1 deletions
67
doc/device-tree-bindings/memory/memory.txt
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67
doc/device-tree-bindings/memory/memory.txt
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@ -0,0 +1,67 @@
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* Memory binding
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The memory binding for U-Boot is as in the ePAPR with the following additions:
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Optional subnodes can be used defining the memory layout for different board
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ID masks. To match a set of board ids, a board-id node may define match-mask
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and match-value ints to define a mask to apply to the board id, and the value
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that the result should have for the match to be considered valid. The mask
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defaults to -1, meaning that the value must fully match the board id.
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If subnodes are present, then the /memory node must define these properties:
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- #address-cells: should be 1.
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- #size-cells: should be 0.
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Each subnode must define
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reg - board ID or mask for this subnode
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memory-banks - list of memory banks in the same format as normal
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Each subnode may optionally define:
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match-mask - A mask to apply to the board id. This must be accompanied by
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match-value.
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match-value - The required resulting value of the board id mask for the given
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node to be considered a match.
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auto-size - Indicates that the value given for a bank is the maximum size,
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each bank is probed to determine its actual size, which may be
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smaller
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The board id determination is up to the vendor and is not defined by this
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binding.
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Example:
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memory {
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#address-cells = <1>;
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#size-cells = <1>;
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reg = <0x20000000 0x20000000
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0x40000000 0x20000000
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0x60000000 0x20000000
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0x80000000 0x20000000>;
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auto-size;
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board-id@0 {
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match-value = <17>;
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reg = <0x20000000 0x20000000
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0x40000000 0x20000000>;
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};
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board-id@1 {
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match-mask = <2>;
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match-value = <2>;
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reg = <0x20000000 0x20000000
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0x40000000 0x20000000
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0x60000000 0x20000000
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0x80000000 0x20000000
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0xa0000000 0x20000000
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0xc0000000 0x20000000
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0xe0000000 0x20000000>;
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};
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};
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This shows a system with the following properties:
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* Default of 2GB of memory, auto-sized, so could be smaller
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* 3.5GB of memory (with no auto-size) if (board id & 2) is 2
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* 1GB of memory (with no auto-size) if board id is 17.
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@ -52,6 +52,7 @@ typedef struct global_data {
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unsigned long env_has_init; /* Bitmask of boolean of struct env_location offsets */
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int env_load_location;
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unsigned long ram_base; /* Base address of RAM used by U-Boot */
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unsigned long ram_top; /* Top address of RAM used by U-Boot */
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unsigned long relocaddr; /* Start address of U-Boot in RAM */
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phys_size_t ram_size; /* RAM size */
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@ -283,6 +283,16 @@ int fdt_setup_simplefb_node(void *fdt, int node, u64 base_address, u32 width,
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int fdt_overlay_apply_verbose(void *fdt, void *fdto);
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/**
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* fdt_get_cells_len() - Get the length of a type of cell in top-level nodes
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*
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* Returns the length of the cell type in bytes (4 or 8).
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*
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* @blob: Pointer to device tree blob
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* @nr_cells_name: Name to lookup, e.g. "#address-cells"
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*/
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int fdt_get_cells_len(const void *blob, char *nr_cells_name);
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#endif /* ifdef CONFIG_OF_LIBFDT */
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#ifdef USE_HOSTCC
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@ -41,6 +41,8 @@ struct fdt_memory {
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fdt_addr_t end;
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};
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struct bd_info;
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#ifdef CONFIG_SPL_BUILD
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#define SPL_BUILD 1
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#else
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@ -993,6 +995,40 @@ int fdtdec_setup(void);
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* Called when CONFIG_OF_BOARD is defined, or if CONFIG_OF_SEPARATE is defined
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* and the board implements it.
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*/
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void *board_fdt_blob_setup(void);
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/*
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* Decode the size of memory
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*
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* RAM size is normally set in a /memory node and consists of a list of
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* (base, size) cells in the 'reg' property. This information is used to
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* determine the total available memory as well as the address and size
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* of each bank.
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*
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* Optionally the memory configuration can vary depending on a board id,
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* typically read from strapping resistors or an EEPROM on the board.
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*
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* Finally, memory size can be detected (within certain limits) by probing
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* the available memory. It is safe to do so within the limits provides by
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* the board's device tree information. This makes it possible to produce
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* boards with different memory sizes, where the device tree specifies the
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* maximum memory configuration, and the smaller memory configuration is
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* probed.
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*
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* This function decodes that information, returning the memory base address,
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* size and bank information. See the memory.txt binding for full
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* documentation.
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*
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* @param blob Device tree blob
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* @param area Name of node to check (NULL means "/memory")
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* @param board_id Board ID to look up
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* @param basep Returns base address of first memory bank (NULL to
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* ignore)
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* @param sizep Returns total memory size (NULL to ignore)
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* @param bd Updated with the memory bank information (NULL to skip)
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* @return 0 if OK, -ve on error
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*/
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int fdtdec_decode_ram_size(const void *blob, const char *area, int board_id,
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phys_addr_t *basep, phys_size_t *sizep,
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struct bd_info *bd);
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#endif
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109
lib/fdtdec.c
109
lib/fdtdec.c
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@ -11,6 +11,7 @@
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#include <errno.h>
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#include <fdtdec.h>
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#include <fdt_support.h>
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#include <inttypes.h>
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#include <linux/libfdt.h>
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#include <serial.h>
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#include <asm/sections.h>
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@ -1350,4 +1351,112 @@ int fdtdec_setup(void)
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return fdtdec_prepare_fdt();
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}
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#ifdef CONFIG_NR_DRAM_BANKS
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int fdtdec_decode_ram_size(const void *blob, const char *area, int board_id,
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phys_addr_t *basep, phys_size_t *sizep, bd_t *bd)
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{
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int addr_cells, size_cells;
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const u32 *cell, *end;
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u64 total_size, size, addr;
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int node, child;
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bool auto_size;
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int bank;
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int len;
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debug("%s: board_id=%d\n", __func__, board_id);
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if (!area)
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area = "/memory";
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node = fdt_path_offset(blob, area);
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if (node < 0) {
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debug("No %s node found\n", area);
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return -ENOENT;
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}
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cell = fdt_getprop(blob, node, "reg", &len);
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if (!cell) {
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debug("No reg property found\n");
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return -ENOENT;
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}
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addr_cells = fdt_address_cells(blob, node);
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size_cells = fdt_size_cells(blob, node);
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/* Check the board id and mask */
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for (child = fdt_first_subnode(blob, node);
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child >= 0;
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child = fdt_next_subnode(blob, child)) {
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int match_mask, match_value;
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match_mask = fdtdec_get_int(blob, child, "match-mask", -1);
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match_value = fdtdec_get_int(blob, child, "match-value", -1);
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if (match_value >= 0 &&
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((board_id & match_mask) == match_value)) {
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/* Found matching mask */
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debug("Found matching mask %d\n", match_mask);
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node = child;
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cell = fdt_getprop(blob, node, "reg", &len);
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if (!cell) {
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debug("No memory-banks property found\n");
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return -EINVAL;
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}
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break;
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}
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}
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/* Note: if no matching subnode was found we use the parent node */
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if (bd) {
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memset(bd->bi_dram, '\0', sizeof(bd->bi_dram[0]) *
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CONFIG_NR_DRAM_BANKS);
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}
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auto_size = fdtdec_get_bool(blob, node, "auto-size");
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total_size = 0;
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end = cell + len / 4 - addr_cells - size_cells;
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debug("cell at %p, end %p\n", cell, end);
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for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) {
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if (cell > end)
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break;
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addr = 0;
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if (addr_cells == 2)
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addr += (u64)fdt32_to_cpu(*cell++) << 32UL;
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addr += fdt32_to_cpu(*cell++);
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if (bd)
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bd->bi_dram[bank].start = addr;
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if (basep && !bank)
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*basep = (phys_addr_t)addr;
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size = 0;
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if (size_cells == 2)
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size += (u64)fdt32_to_cpu(*cell++) << 32UL;
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size += fdt32_to_cpu(*cell++);
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if (auto_size) {
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u64 new_size;
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debug("Auto-sizing %" PRIx64 ", size %" PRIx64 ": ",
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addr, size);
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new_size = get_ram_size((long *)(uintptr_t)addr, size);
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if (new_size == size) {
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debug("OK\n");
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} else {
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debug("sized to %" PRIx64 "\n", new_size);
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size = new_size;
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}
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}
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if (bd)
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bd->bi_dram[bank].size = size;
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total_size += size;
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}
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debug("Memory size %" PRIu64 "\n", total_size);
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if (sizep)
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*sizep = (phys_size_t)total_size;
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return 0;
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}
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#endif /* CONFIG_NR_DRAM_BANKS */
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#endif /* !USE_HOSTCC */
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