2018-05-06 21:58:06 +00:00
|
|
|
# SPDX-License-Identifier: GPL-2.0
|
2016-03-12 05:07:18 +00:00
|
|
|
#
|
|
|
|
# Copyright (C) 2016 Google Inc.
|
|
|
|
#
|
|
|
|
|
|
|
|
config INTEL_BROADWELL
|
|
|
|
bool
|
|
|
|
select CACHE_MRC_BIN
|
2017-07-30 13:23:13 +00:00
|
|
|
select ARCH_EARLY_INIT_R
|
2017-07-30 13:23:10 +00:00
|
|
|
imply HAVE_INTEL_ME
|
2017-07-30 13:23:14 +00:00
|
|
|
imply ENABLE_MRC_CACHE
|
2017-07-31 02:24:02 +00:00
|
|
|
imply AHCI_PCI
|
2017-07-30 13:23:19 +00:00
|
|
|
imply ICH_SPI
|
|
|
|
imply INTEL_BROADWELL_GPIO
|
|
|
|
imply SCSI
|
2017-12-08 13:36:19 +00:00
|
|
|
imply SCSI_AHCI
|
2017-07-30 13:23:19 +00:00
|
|
|
imply SPI_FLASH
|
2017-07-30 13:23:27 +00:00
|
|
|
imply USB
|
|
|
|
imply USB_EHCI_HCD
|
2017-07-30 13:23:19 +00:00
|
|
|
imply VIDEO_BROADWELL_IGD
|
2016-03-12 05:07:18 +00:00
|
|
|
|
|
|
|
if INTEL_BROADWELL
|
|
|
|
|
|
|
|
config DCACHE_RAM_BASE
|
|
|
|
default 0xff7c0000
|
|
|
|
|
|
|
|
config DCACHE_RAM_SIZE
|
|
|
|
default 0x40000
|
|
|
|
|
|
|
|
config DCACHE_RAM_MRC_VAR_SIZE
|
|
|
|
default 0x30000
|
|
|
|
|
|
|
|
config CPU_SPECIFIC_OPTIONS
|
|
|
|
def_bool y
|
|
|
|
select SMM_TSEG
|
|
|
|
select X86_RAMTEST
|
|
|
|
|
|
|
|
config SMM_TSEG_SIZE
|
|
|
|
hex
|
|
|
|
default 0x800000
|
|
|
|
|
|
|
|
endif
|