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u-boot/configs/socfpga_agilex_defconfig

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arm: socfpga: agilex: Enable Agilex SoC build Add build support for Agilex SoC. Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com> Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2019-11-27 07:55:32 +00:00
CONFIG_ARM=y
configs: set CONFIG_COUNTER_FREQUENCY Set CONFIG_COUNTER_FREQUENCY according to COUNTER_FREQUENCY in config header file. Signed-off-by: Peng Fan <peng.fan@nxp.com> [trini: Re-run migration]
2022-04-13 09:47:20 +00:00
CONFIG_COUNTER_FREQUENCY=400000000
arm: socfpga: agilex: Enable Agilex SoC build Add build support for Agilex SoC. Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com> Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2019-11-27 07:55:32 +00:00
CONFIG_ARCH_SOCFPGA=y
Rename CONFIG_SYS_TEXT_BASE to CONFIG_TEXT_BASE The current name is inconsistent with SPL which uses CONFIG_SPL_TEXT_BASE and this makes it imposible to use CONFIG_VAL(). Rename it to resolve this problem. Signed-off-by: Simon Glass <sjg@chromium.org>
2022-10-21 00:22:39 +00:00
CONFIG_TEXT_BASE=0x1000
configs: Resync with savedefconfig Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
2021-11-01 12:19:22 +00:00
CONFIG_SYS_MALLOC_LEN=0x500000
configs: Resync with savedefconfig Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
2020-08-10 19:31:07 +00:00
CONFIG_NR_DRAM_BANKS=2
arm: socfpga: agilex: Enable Agilex SoC build Add build support for Agilex SoC. Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com> Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2019-11-27 07:55:32 +00:00
CONFIG_ENV_SIZE=0x1000
CONFIG_ENV_OFFSET=0x200
configs: Resync with savedefconfig Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
2020-01-22 18:38:00 +00:00
CONFIG_DM_GPIO=y
configs: Resync with savedefconfig Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
2021-06-28 14:17:29 +00:00
CONFIG_DEFAULT_DEVICE_TREE="socfpga_agilex_socdk"
configs: Resync with savedefconfig Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
2020-07-06 17:54:25 +00:00
CONFIG_SPL_TEXT_BASE=0xFFE00000
configs: Resync with savedefconfig Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
2022-08-23 19:24:14 +00:00
CONFIG_SYS_PROMPT="SOCFPGA_AGILEX # "
arm: socfpga: agilex: Enable Agilex SoC build Add build support for Agilex SoC. Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com> Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2019-11-27 07:55:32 +00:00
CONFIG_TARGET_SOCFPGA_AGILEX_SOCDK=y
CONFIG_IDENT_STRING="socfpga_agilex"
CONFIG_SPL_FS_FAT=y
arm: socfpga: soc64: Disable CONFIG_PSCI_RESET Don't invoke 'SYSTEM_RESET' PSCI function because PSCI function calls are not supported by u-boot running in EL3. Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com> Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
2020-08-14 03:07:23 +00:00
# CONFIG_PSCI_RESET is not set
configs: Resync with savedefconfig Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
2022-04-08 17:36:51 +00:00
CONFIG_SYS_LOAD_ADDR=0x02000000
configs: Resync with savedefconfig Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
2022-04-01 14:33:18 +00:00
CONFIG_SYS_MEMTEST_START=0x00000000
CONFIG_SYS_MEMTEST_END=0x3fe00000
Migrate CUSTOM_SYS_INIT_SP_ADDR to Kconfig using system-constants.h - Make all users of CUSTOM_SYS_INIT_SP_ADDR reference SYS_INIT_SP_ADDR - Introduce HAS_CUSTOM_SYS_INIT_SP_ADDR to allow for setting the stack pointer directly, otherwise we use the common calculation. - On some platforms that were using the standard calculation but did not set CONFIG_SYS_INIT_RAM_SIZE / CONFIG_SYS_INIT_RAM_ADDR, set them. - On a small number of platforms that were not subtracting GENERATED_GBL_DATA_SIZE do so now via the standard calculation. - CONFIG_SYS_INIT_SP_OFFSET is now widely unused, so remove it from most board config header files. Signed-off-by: Tom Rini <trini@konsulko.com>
2022-05-25 16:16:03 +00:00
CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x101000
Convert CONFIG_REMAKE_ELF to Kconfig This converts the following to Kconfig: CONFIG_REMAKE_ELF Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
2022-01-29 15:25:30 +00:00
CONFIG_REMAKE_ELF=y
arm: socfpga: agilex: Enable Agilex SoC build Add build support for Agilex SoC. Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com> Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2019-11-27 07:55:32 +00:00
CONFIG_BOOTDELAY=5
Convert CONFIG_BOOTARGS to Kconfig This converts the following to Kconfig: CONFIG_BOOTARGS Signed-off-by: Tom Rini <trini@konsulko.com>
2020-06-16 23:06:12 +00:00
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="earlycon"
configs: socfpga: soc64: Move CONFIG_BOOTCOMMAND to defconfig CONFIG_BOOTCOMMAND have been moved to Kconfig.boot. This patch move the CONFIG_BOOTCOMMAND macro from socfpga_soc64_common.h to *_defconfig file for both Stratix 10 and Agilex. Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
2021-03-01 12:04:14 +00:00
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="run fatscript; run mmcload; run linux_qspi_enable; run mmcboot"
Convert CONFIG_SPL_PAD_TO et al to Kconfig This converts the following to Kconfig: CONFIG_SPL_PAD_TO CONFIG_SPL_MAX_SIZE CONFIG_TPL_PAD_TO CONFIG_TPL_MAX_SIZE Note that we need to make TPL_MAX_SIZE be hex, and so move and convert the existing places. Signed-off-by: Tom Rini <trini@konsulko.com>
2022-05-16 21:20:26 +00:00
CONFIG_SPL_MAX_SIZE=0x40000
Convert CONFIG_SPL_BSS_START_ADDR to Kconfig This converts the following to Kconfig: CONFIG_SPL_BSS_START_ADDR Signed-off-by: Tom Rini <trini@konsulko.com>
2022-05-27 14:19:45 +00:00
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x3ff00000
Convert CONFIG_SPL_BSS_MAX_SIZE et al to Kconfig This converts the following to Kconfig: CONFIG_SPL_BSS_MAX_SIZE CONFIG_SPL_MAX_FOOTPRINT Note that the da850evm platforms were violating the "only use one" rule here, and so now hard-code their BSS limit. Signed-off-by: Tom Rini <trini@konsulko.com>
2022-05-19 19:09:22 +00:00
CONFIG_SPL_BSS_MAX_SIZE=0x100000
Convert CONFIG_SPL_STACK to Kconfig This converts the following to Kconfig: CONFIG_SPL_STACK Signed-off-by: Tom Rini <trini@konsulko.com>
2022-05-26 17:13:21 +00:00
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
CONFIG_SPL_STACK=0xffe3f000
Convert CONFIG_SYS_SPL_MALLOC_SIZE et al to Kconfig This converts the following to Kconfig: CONFIG_SYS_SPL_MALLOC_SIZE CONFIG_SYS_SPL_MALLOC_START We introduce a default value here as well, and CONFIG_SYS_SPL_MALLOC to control if we have a malloc pool or not. Signed-off-by: Tom Rini <trini@konsulko.com>
2022-05-27 16:48:32 +00:00
CONFIG_SYS_SPL_MALLOC=y
CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y
CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x3fa00000
CONFIG_SYS_SPL_MALLOC_SIZE=0x500000
arm: socfpga: agilex: Enable Agilex SoC build Add build support for Agilex SoC. Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com> Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2019-11-27 07:55:32 +00:00
CONFIG_SPL_CACHE=y
CONFIG_SPL_SPI_LOAD=y
configs: Resync with savedefconfig Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
2021-08-10 19:08:46 +00:00
CONFIG_SYS_SPI_U_BOOT_OFFS=0x3c00000
Convert CONFIG_SPL_TARGET to Kconfig This converts the following to Kconfig: CONFIG_SPL_TARGET Signed-off-by: Tom Rini <trini@konsulko.com>
2022-05-27 21:13:52 +00:00
CONFIG_SPL_TARGET="spl/u-boot-spl-dtb.hex"
arm: socfpga: agilex: Enable Agilex SoC build Add build support for Agilex SoC. Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com> Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2019-11-27 07:55:32 +00:00
CONFIG_HUSH_PARSER=y
Convert CONFIG_SYS_MAXARGS to Kconfig This converts the following to Kconfig: CONFIG_SYS_MAXARGS Signed-off-by: Tom Rini <trini@konsulko.com>
2022-05-11 20:21:06 +00:00
CONFIG_SYS_MAXARGS=64
Convert CONFIG_SYS_PBSIZE to Kconfig This converts the following to Kconfig: CONFIG_SYS_PBSIZE Signed-off-by: Tom Rini <trini@konsulko.com>
2022-05-11 21:38:09 +00:00
CONFIG_SYS_PBSIZE=2082
Convert CONFIG_SYS_BOOTM_LEN to Kconfig This converts the following to Kconfig: CONFIG_SYS_BOOTM_LEN As part of this, rework error handling in boot/bootm.c so that we pass the buffer size to handle_decomp_error as CONFIG_SYS_BOOTM_LEN will not be available to host tools but we do know the size that we passed to malloc(). Cc: Soeren Moch <smoch@web.de> Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-25 23:29:46 +00:00
CONFIG_SYS_BOOTM_LEN=0x2000000
arm: socfpga: agilex: Enable Agilex SoC build Add build support for Agilex SoC. Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com> Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2019-11-27 07:55:32 +00:00
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_EXT4=y
CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
CONFIG_ENV_IS_IN_MMC=y
Convert CONFIG_BOOTFILE to Kconfig This converts the following to Kconfig: CONFIG_BOOTFILE Signed-off-by: Tom Rini <trini@konsulko.com>
2022-02-25 16:19:48 +00:00
CONFIG_USE_BOOTFILE=y
CONFIG_BOOTFILE="Image"
arm: socfpga: agilex: Enable Agilex SoC build Add build support for Agilex SoC. Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com> Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2019-11-27 07:55:32 +00:00
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_SPL_ALTERA_SDRAM=y
CONFIG_DWAPB_GPIO=y
CONFIG_DM_I2C=y
CONFIG_SYS_I2C_DW=y
Convert CONFIG_SYS_MMC_MAX_BLK_COUNT to Kconfig This converts the following to Kconfig: CONFIG_SYS_MMC_MAX_BLK_COUNT Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2022-10-29 00:27:05 +00:00
CONFIG_SYS_MMC_MAX_BLK_COUNT=256
arm: socfpga: agilex: Enable Agilex SoC build Add build support for Agilex SoC. Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com> Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2019-11-27 07:55:32 +00:00
CONFIG_MMC_DW=y
CONFIG_SF_DEFAULT_MODE=0x2003
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_PHY_MICREL=y
CONFIG_PHY_MICREL_KSZ90X1=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_MII=y
CONFIG_DM_RESET=y
CONFIG_SPI=y
CONFIG_CADENCE_QSPI=y
CONFIG_DESIGNWARE_SPI=y
CONFIG_USB=y
CONFIG_USB_DWC2=y
CONFIG_USB_STORAGE=y
arm: socfpga: Use DM watchdog timer All SoCFPGA platforms (except Cyclone V) are now switching to CONFIG_WDT (driver model for watchdog timer drivers) from CONFIG_HW_WATCHDOG. Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com> Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
2020-08-06 04:15:33 +00:00
CONFIG_DESIGNWARE_WATCHDOG=y
CONFIG_WDT=y
arm: socfpga: agilex: Enable Agilex SoC build Add build support for Agilex SoC. Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com> Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2019-11-27 07:55:32 +00:00
# CONFIG_SPL_USE_TINY_PRINTF is not set
configs: socfpga: soc64: Avoid SPL enter infinite loop during exception In current implementation, any exception would trigger a CPU reset. But a bad written SPL would cause infinite loop where the system will reload the same SPL instead of loading factory safe image. Hence this patch is to ensure any exception will cause a hang. At this moment, watchdog shall be triggered and Remote System Update mechanism shall load the next production image or factory safe image. Signed-off-by: Chin Liang See <chin.liang.see@intel.com> Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com> Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
2020-08-05 10:34:33 +00:00
CONFIG_PANIC_HANG=y
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