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u-boot/configs/roc-pc-rk3399_defconfig

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rockchip: rk3399: Add ROC-RK3399-PC support Add initial support for ROC-RK3399-PC board. Specification - Rockchip RK3399 - LPDDR4 4GiB - eMMC slot - SD card slot - RTL8211E 1Gbps - HDMI Out, DP, MIPI DSI/CSI, EDP - PCIe M.2 - USB 2.0, USB-3.0 - USB C Type Commit details of rk3399-roc-pc.dts sync from Linux v5.2: "arm64: dts: rockchip: add support for ROC-RK3399-PC board" (sha1: 8bb878cf20ae10809c36db96993bfce7026d062b) Signed-off-by: Levin Du <djw@t-chip.com.cn> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-07-26 07:43:54 +00:00
CONFIG_ARM=y
Convert CONFIG_SKIP_LOWLEVEL_INIT et al to Kconfig This converts the following to Kconfig: CONFIG_SKIP_LOWLEVEL_INIT CONFIG_SKIP_LOWLEVEL_INIT_ONLY In order to do this, we need to introduce SPL and TPL variants of these options so that we can clearly disable these options only in SPL in some cases, and both instances in other cases. Signed-off-by: Tom Rini <trini@konsulko.com>
2021-08-28 01:18:30 +00:00
CONFIG_SKIP_LOWLEVEL_INIT=y
configs: set CONFIG_COUNTER_FREQUENCY Set CONFIG_COUNTER_FREQUENCY according to COUNTER_FREQUENCY in config header file. Signed-off-by: Peng Fan <peng.fan@nxp.com> [trini: Re-run migration]
2022-04-13 09:47:20 +00:00
CONFIG_COUNTER_FREQUENCY=24000000
rockchip: rk3399: Add ROC-RK3399-PC support Add initial support for ROC-RK3399-PC board. Specification - Rockchip RK3399 - LPDDR4 4GiB - eMMC slot - SD card slot - RTL8211E 1Gbps - HDMI Out, DP, MIPI DSI/CSI, EDP - PCIe M.2 - USB 2.0, USB-3.0 - USB C Type Commit details of rk3399-roc-pc.dts sync from Linux v5.2: "arm64: dts: rockchip: add support for ROC-RK3399-PC board" (sha1: 8bb878cf20ae10809c36db96993bfce7026d062b) Signed-off-by: Levin Du <djw@t-chip.com.cn> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-07-26 07:43:54 +00:00
CONFIG_ARCH_ROCKCHIP=y
Rename CONFIG_SYS_TEXT_BASE to CONFIG_TEXT_BASE The current name is inconsistent with SPL which uses CONFIG_SPL_TEXT_BASE and this makes it imposible to use CONFIG_VAL(). Rename it to resolve this problem. Signed-off-by: Simon Glass <sjg@chromium.org>
2022-10-21 00:22:39 +00:00
CONFIG_TEXT_BASE=0x00200000
Rename GPIO_SUPPORT to GPIO Rename these options so that CONFIG_IS_ENABLED can be used with them. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-07-11 03:14:30 +00:00
CONFIG_SPL_GPIO=y
configs: Resync with savedefconfig Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
2020-08-10 19:31:07 +00:00
CONFIG_NR_DRAM_BANKS=1
configs: Resync with savedefconfig Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
2023-02-17 14:58:06 +00:00
CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000
configs: Resync with savedefconfig Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
2023-05-01 15:50:26 +00:00
CONFIG_SF_DEFAULT_SPEED=30000000
rockchip: roc-rk3399-pc: Update ENV offset, size Adjust the ENV offset, size to fit into all images on 16MB flash. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-07-07 13:50:49 +00:00
CONFIG_ENV_SIZE=0x8000
CONFIG_ENV_OFFSET=0x3F8000
roc-rk3399-pc: Mark default env from SPI Mark the default U-Boot environment as SPI flash since this is an on board flash device. Updated env offset, size in contrast with default since the U-Boot proper has to start from 384K. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-06-04 14:51:39 +00:00
CONFIG_ENV_SECT_SIZE=0x1000
configs: Resync with savedefconfig Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
2021-06-28 14:17:29 +00:00
CONFIG_DEFAULT_DEVICE_TREE="rk3399-roc-pc"
configs: Resync with savedefconfig Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
2023-02-17 14:58:06 +00:00
CONFIG_DM_RESET=y
configs: Resync with savedefconfig Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
2020-01-22 18:38:00 +00:00
CONFIG_ROCKCHIP_RK3399=y
rockchip: rk3399-roc-pc: Fix SPL max size and SPI flash payload offset TPL max size is limited to 184 KB, SPL is loaded to 0x0 and TF-A is loaded to 0x40000, this limit SPL max size to 256 KB. With BootRom only reading first 2 KB per 4 KB page of SPI flash, 880 KB may be needed for TPL+SPL in a worst-case scenario. (184 KB + 256 KB) x 2 = 880 KB Use 0xE0000 (896 KB) as the payload offset in SPI flash, this allows for a payload of 3168 KB before env offset start to overlap. Also add CONFIG_ROCKCHIP_SPI_IMAGE=y to build a bootable SPI flash image, u-boot-rockchip-spi.bin. Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Quentin Schulz <foss+u-boot@0leil.net> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-07-28 11:38:38 +00:00
CONFIG_ROCKCHIP_SPI_IMAGE=y
rockchip: rk3399: split roc-pc-rk3399 out of evb_rk3399 roc-pc-rk3399 board has one user button & three user LED's. Currently we don't have any code support for these devices. Since button and LED's are specific to roc-pc-rk3399 board, split it into its own board file and add code support here. Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-02-03 13:50:04 +00:00
CONFIG_TARGET_ROC_PC_RK3399=y
configs: Resync with savedefconfig Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
2023-02-17 14:58:06 +00:00
CONFIG_SPL_STACK=0x400000
rockchip: rk3399: Add ROC-RK3399-PC support Add initial support for ROC-RK3399-PC board. Specification - Rockchip RK3399 - LPDDR4 4GiB - eMMC slot - SD card slot - RTL8211E 1Gbps - HDMI Out, DP, MIPI DSI/CSI, EDP - PCIe M.2 - USB 2.0, USB-3.0 - USB C Type Commit details of rk3399-roc-pc.dts sync from Linux v5.2: "arm64: dts: rockchip: add support for ROC-RK3399-PC board" (sha1: 8bb878cf20ae10809c36db96993bfce7026d062b) Signed-off-by: Levin Du <djw@t-chip.com.cn> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-07-26 07:43:54 +00:00
CONFIG_DEBUG_UART_BASE=0xFF1A0000
CONFIG_DEBUG_UART_CLOCK=24000000
roc-rk3399-pc: Add SPI boot U-Boot TPL 2020.07-rc3-00090-gd4e919f927-dirty (Jun 01 2020 - 23:45:53) Channel 0: LPDDR4, 50MHz BW=32 Col=10 Bk=8 CS0 Row=15 CS1 Row=15 CS=2 Die BW=16 Size=2048MB Channel 1: LPDDR4, 50MHz BW=32 Col=10 Bk=8 CS0 Row=15 CS1 Row=15 CS=2 Die BW=16 Size=2048MB 256B stride 256B stride lpddr4_set_rate: change freq to 400000000 mhz 0, 1 lpddr4_set_rate: change freq to 800000000 mhz 1, 0 Trying to boot from BOOTROM Returning to boot ROM... U-Boot SPL 2020.07-rc3-00087-ga21e9fd385 (Jun 02 2020 - 00:09:45 +0530) Trying to boot from MMC1 NOTICE: BL31: v2.2(release): NOTICE: BL31: Built : 15:05:37, May 12 2020 U-Boot 2020.07-rc3-00087-ga21e9fd385 (Jun 02 2020 - 00:09:45 +0530) SoC: Rockchip rk3399 Reset cause: POR Model: Firefly ROC-RK3399-PC Board DRAM: 3.9 GiB PMIC: RK808 MMC: mmc@fe320000: 1, sdhci@fe330000: 0 Loading Environment from SPI Flash... SF: Detected w25q128 with page size 256 Bytes, erase size 4 KiB, total 16 MiB *** Warning - bad CRC, using default environment In: serial Out: serial Err: serial Model: Firefly ROC-RK3399-PC Board Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-06-04 14:51:40 +00:00
CONFIG_SPL_SPI_FLASH_SUPPORT=y
spi: Rename SPI_SUPPORT to SPI Rename these options so that CONFIG_IS_ENABLED can be used with them. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-08-08 18:20:14 +00:00
CONFIG_SPL_SPI=y
Convert CONFIG_SYS_LOAD_ADDR to Kconfig Now that we have consistent usage, migrate this symbol to Kconfig. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Rick Chen <rick@andestech.com>
2021-08-23 14:25:31 +00:00
CONFIG_SYS_LOAD_ADDR=0x800800
configs: Resync with savedefconfig Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
2022-04-08 17:36:51 +00:00
CONFIG_DEBUG_UART=y
rockchip: roc-rk3399-pc: Enable USB Gadget Enable DWC3 core, gadget for roc-rk3399-pc board. This would help to use fastboot by default. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-07-07 13:50:48 +00:00
# CONFIG_ANDROID_BOOT_IMAGE is not set
configs:rockchip:roc-rk3399-pc:Enable more configs This patch enables the following: 1) use preboot configuration to enable usb devices. 2) Enable USB configs so keyboards and other USB devices work, update the number of ports of the usb root hub. - with this addition the updated USB device Tree: 1 Hub (12 Mb/s, 0mA) U-Boot Root Hub 1 Hub (12 Mb/s, 0mA) | U-Boot Root Hub | +-2 Hub (12 Mb/s, 100mA) USB 2.0 Hub [MTT] 1 Hub (5 Gb/s, 0mA) U-Boot XHCI Host Controller 3) enable crypto RNG support. 4) Change SPI speed and frequency: - increase the maximum SPI slave device speed, SPI flash max frequency for the environment from 10Mhz to 30MHz. - performance stats for speed update from 10MHz to 30MHz: with 10Mhz speed update: => sf update 0x300000 0x800000 0x400000 4194304 bytes written, 0 bytes skipped in 36.819s, speed 119837 B/s with 30Mhz speed update: => sf update 0x300000 0x800000 0x400000 4194304 bytes written, 0 bytes skipped in 20.319s, speed 220752 B/s Signed-off-by: Manoj Sai <abbaraju.manojsai@amarulasolutions.com> Signed-off-by: Da Xue <da.xue@libretech.co> Signed-off-by: dsx724 <da@lessconfused.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-09-15 07:23:19 +00:00
CONFIG_USE_PREBOOT=y
rockchip: rk3399: Add ROC-RK3399-PC support Add initial support for ROC-RK3399-PC board. Specification - Rockchip RK3399 - LPDDR4 4GiB - eMMC slot - SD card slot - RTL8211E 1Gbps - HDMI Out, DP, MIPI DSI/CSI, EDP - PCIe M.2 - USB 2.0, USB-3.0 - USB C Type Commit details of rk3399-roc-pc.dts sync from Linux v5.2: "arm64: dts: rockchip: add support for ROC-RK3399-PC board" (sha1: 8bb878cf20ae10809c36db96993bfce7026d062b) Signed-off-by: Levin Du <djw@t-chip.com.cn> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-07-26 07:43:54 +00:00
CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-roc-pc.dtb"
CONFIG_DISPLAY_BOARDINFO_LATE=y
configs: roc-pc-rk3399: Enable rockchip efuse support Enable efuse support which allows reading of the cpuid#, serial# and also generates a unique mac address from the board's serial. Signed-off-by: Christopher Obbard <chris.obbard@collabora.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-11-23 13:59:02 +00:00
CONFIG_MISC_INIT_R=y
rockchip: rk3399-roc-pc: Fix SPL max size and SPI flash payload offset TPL max size is limited to 184 KB, SPL is loaded to 0x0 and TF-A is loaded to 0x40000, this limit SPL max size to 256 KB. With BootRom only reading first 2 KB per 4 KB page of SPI flash, 880 KB may be needed for TPL+SPL in a worst-case scenario. (184 KB + 256 KB) x 2 = 880 KB Use 0xE0000 (896 KB) as the payload offset in SPI flash, this allows for a payload of 3168 KB before env offset start to overlap. Also add CONFIG_ROCKCHIP_SPI_IMAGE=y to build a bootable SPI flash image, u-boot-rockchip-spi.bin. Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Quentin Schulz <foss+u-boot@0leil.net> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-07-28 11:38:38 +00:00
CONFIG_SPL_MAX_SIZE=0x40000
Convert CONFIG_SPL_PAD_TO et al to Kconfig This converts the following to Kconfig: CONFIG_SPL_PAD_TO CONFIG_SPL_MAX_SIZE CONFIG_TPL_PAD_TO CONFIG_TPL_MAX_SIZE Note that we need to make TPL_MAX_SIZE be hex, and so move and convert the existing places. Signed-off-by: Tom Rini <trini@konsulko.com>
2022-05-16 21:20:26 +00:00
CONFIG_SPL_PAD_TO=0x7f8000
Convert CONFIG_SPL_BSS_START_ADDR to Kconfig This converts the following to Kconfig: CONFIG_SPL_BSS_START_ADDR Signed-off-by: Tom Rini <trini@konsulko.com>
2022-05-27 14:19:45 +00:00
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x400000
Convert CONFIG_SPL_BSS_MAX_SIZE et al to Kconfig This converts the following to Kconfig: CONFIG_SPL_BSS_MAX_SIZE CONFIG_SPL_MAX_FOOTPRINT Note that the da850evm platforms were violating the "only use one" rule here, and so now hard-code their BSS limit. Signed-off-by: Tom Rini <trini@konsulko.com>
2022-05-19 19:09:22 +00:00
CONFIG_SPL_BSS_MAX_SIZE=0x2000
rockchip: rk3399: defconfig: remove SPL raw image support RK3399 SPL only support FIT image for ATF bl31. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-08-20 03:47:02 +00:00
# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
Convert CONFIG_SPL_STACK to Kconfig This converts the following to Kconfig: CONFIG_SPL_STACK Signed-off-by: Tom Rini <trini@konsulko.com>
2022-05-26 17:13:21 +00:00
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
rockchip: rk3399: Add ROC-RK3399-PC support Add initial support for ROC-RK3399-PC board. Specification - Rockchip RK3399 - LPDDR4 4GiB - eMMC slot - SD card slot - RTL8211E 1Gbps - HDMI Out, DP, MIPI DSI/CSI, EDP - PCIe M.2 - USB 2.0, USB-3.0 - USB C Type Commit details of rk3399-roc-pc.dts sync from Linux v5.2: "arm64: dts: rockchip: add support for ROC-RK3399-PC board" (sha1: 8bb878cf20ae10809c36db96993bfce7026d062b) Signed-off-by: Levin Du <djw@t-chip.com.cn> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-07-26 07:43:54 +00:00
CONFIG_SPL_STACK_R=y
rockchip: roc-rk3399-pc: Set LED only during POR and pwr_key=y ROC-RK3399-PC has specific set of configurations for on-board led setup. Due to easiness for user to know the state of the board roc-rk339-pc board code will setup the low power led on/off, and waiting for user to press power key and then glow full power led. All this needs to happen only during power-on-reset not for soft reset or WDT. Also, it is not a proper usage to ask the user to press the Power key if the board connected remotely, so add the environment variable 'pwr_key' to check as well. So, user need to press Power key only - during POR - pwr_key=y Tested-by: Suniel Mahesh <sunil@amarulasolutions.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-07-21 15:06:04 +00:00
CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x20000
CONFIG_SPL_ENV_SUPPORT=y
roc-rk3399-pc: Add SPI boot U-Boot TPL 2020.07-rc3-00090-gd4e919f927-dirty (Jun 01 2020 - 23:45:53) Channel 0: LPDDR4, 50MHz BW=32 Col=10 Bk=8 CS0 Row=15 CS1 Row=15 CS=2 Die BW=16 Size=2048MB Channel 1: LPDDR4, 50MHz BW=32 Col=10 Bk=8 CS0 Row=15 CS1 Row=15 CS=2 Die BW=16 Size=2048MB 256B stride 256B stride lpddr4_set_rate: change freq to 400000000 mhz 0, 1 lpddr4_set_rate: change freq to 800000000 mhz 1, 0 Trying to boot from BOOTROM Returning to boot ROM... U-Boot SPL 2020.07-rc3-00087-ga21e9fd385 (Jun 02 2020 - 00:09:45 +0530) Trying to boot from MMC1 NOTICE: BL31: v2.2(release): NOTICE: BL31: Built : 15:05:37, May 12 2020 U-Boot 2020.07-rc3-00087-ga21e9fd385 (Jun 02 2020 - 00:09:45 +0530) SoC: Rockchip rk3399 Reset cause: POR Model: Firefly ROC-RK3399-PC Board DRAM: 3.9 GiB PMIC: RK808 MMC: mmc@fe320000: 1, sdhci@fe330000: 0 Loading Environment from SPI Flash... SF: Detected w25q128 with page size 256 Bytes, erase size 4 KiB, total 16 MiB *** Warning - bad CRC, using default environment In: serial Out: serial Err: serial Model: Firefly ROC-RK3399-PC Board Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-06-04 14:51:40 +00:00
CONFIG_SPL_SPI_LOAD=y
rockchip: rk3399-roc-pc: Fix SPL max size and SPI flash payload offset TPL max size is limited to 184 KB, SPL is loaded to 0x0 and TF-A is loaded to 0x40000, this limit SPL max size to 256 KB. With BootRom only reading first 2 KB per 4 KB page of SPI flash, 880 KB may be needed for TPL+SPL in a worst-case scenario. (184 KB + 256 KB) x 2 = 880 KB Use 0xE0000 (896 KB) as the payload offset in SPI flash, this allows for a payload of 3168 KB before env offset start to overlap. Also add CONFIG_ROCKCHIP_SPI_IMAGE=y to build a bootable SPI flash image, u-boot-rockchip-spi.bin. Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Quentin Schulz <foss+u-boot@0leil.net> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-07-28 11:38:38 +00:00
CONFIG_SYS_SPI_U_BOOT_OFFS=0xE0000
rockchip: rk3399: pass platform parameter to TF-A by default for new RK3399 boards Long are gone the times TF-A couldn't handle the FDT passed by U-Boot. Specifically, since commit e7b586987c0a ("rockchip: don't crash if we get an FDT we can't parse") in TF-A, failure to parse the FDT will use the fallback mechanism. This patch was merged in TF-A v2.4-rc0 from two years ago. New boards should likely have this option disabled or explicitly enable it in their respective defconfig. Because existing boards might depend on a TF-A version that predates v2.4, let's just enable this option in all RK3399 defconfigs. Maintainers of each board can decide for themselves if they would prefer to disable this option and allow U-Boot to pass the DT to TF-A. Cc: Quentin Schulz <foss+uboot@0leil.net> Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-06-21 16:02:52 +00:00
CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
configs: Resync with savedefconfig Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
2019-08-25 16:03:24 +00:00
CONFIG_TPL=y
rockchip: rk3399: Add ROC-RK3399-PC support Add initial support for ROC-RK3399-PC board. Specification - Rockchip RK3399 - LPDDR4 4GiB - eMMC slot - SD card slot - RTL8211E 1Gbps - HDMI Out, DP, MIPI DSI/CSI, EDP - PCIe M.2 - USB 2.0, USB-3.0 - USB C Type Commit details of rk3399-roc-pc.dts sync from Linux v5.2: "arm64: dts: rockchip: add support for ROC-RK3399-PC board" (sha1: 8bb878cf20ae10809c36db96993bfce7026d062b) Signed-off-by: Levin Du <djw@t-chip.com.cn> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-07-26 07:43:54 +00:00
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_GPT=y
CONFIG_CMD_MMC=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_TIME=y
CONFIG_SPL_OF_CONTROL=y
CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
roc-rk3399-pc: Mark default env from SPI Mark the default U-Boot environment as SPI flash since this is an on board flash device. Updated env offset, size in contrast with default since the U-Boot proper has to start from 384K. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-06-04 14:51:39 +00:00
CONFIG_ENV_IS_IN_SPI_FLASH=y
env: Add CONFIG_SYS_RELOC_GD_ENV_ADDR symbol Today in initr_reloc_global_data() we use some non-obvious tests to determine if we need to relocate the env_addr within gd or not. In order to facilitate migration of other symbols to Kconfig we need to introduce a new symbol for this particular use case. Cc: Wolfgang Denk <wd@denx.de> Cc: Joe Hershberger <joe.hershberger@ni.com> Signed-off-by: Tom Rini <trini@konsulko.com>
2019-11-13 03:46:36 +00:00
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
rockchip: roc-rk3399-pc: Set LED only during POR and pwr_key=y ROC-RK3399-PC has specific set of configurations for on-board led setup. Due to easiness for user to know the state of the board roc-rk339-pc board code will setup the low power led on/off, and waiting for user to press power key and then glow full power led. All this needs to happen only during power-on-reset not for soft reset or WDT. Also, it is not a proper usage to ask the user to press the Power key if the board connected remotely, so add the environment variable 'pwr_key' to check as well. So, user need to press Power key only - during POR - pwr_key=y Tested-by: Suniel Mahesh <sunil@amarulasolutions.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-07-21 15:06:04 +00:00
CONFIG_SPL_DM_SEQ_ALIAS=y
rockchip: rk3399: Add ROC-RK3399-PC support Add initial support for ROC-RK3399-PC board. Specification - Rockchip RK3399 - LPDDR4 4GiB - eMMC slot - SD card slot - RTL8211E 1Gbps - HDMI Out, DP, MIPI DSI/CSI, EDP - PCIe M.2 - USB 2.0, USB-3.0 - USB C Type Commit details of rk3399-roc-pc.dts sync from Linux v5.2: "arm64: dts: rockchip: add support for ROC-RK3399-PC board" (sha1: 8bb878cf20ae10809c36db96993bfce7026d062b) Signed-off-by: Levin Du <djw@t-chip.com.cn> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-07-26 07:43:54 +00:00
CONFIG_ROCKCHIP_GPIO=y
CONFIG_SYS_I2C_ROCKCHIP=y
roc-rk3399-pc: Enable USB3.0 Host Enable USB3.0 Host support for ROC-RK3399-PC boards. Tested USB3.0 SSD on Type C1 port on board. => usb start starting USB... Bus usb@fe380000: USB EHCI 1.00 Bus usb@fe3c0000: USB EHCI 1.00 Bus dwc3: usb maximum-speed not found Register 2000140 NbrPorts 2 Starting the controller USB XHCI 1.10 scanning bus usb@fe380000 for devices... 1 USB Device(s) found scanning bus usb@fe3c0000 for devices... 2 USB Device(s) found scanning bus dwc3 for devices... 6 USB Device(s) found scanning usb for storage devices... 1 Storage Device(s) found => usb tree USB device tree: 1 Hub (480 Mb/s, 0mA) u-boot EHCI Host Controller 1 Hub (480 Mb/s, 0mA) | u-boot EHCI Host Controller | +-2 Hub (480 Mb/s, 100mA) USB 2.0 Hub [MTT] 1 Hub (5 Gb/s, 0mA) | U-Boot XHCI Host Controller | +-2 Hub (480 Mb/s, 0mA) | | VIA Labs, Inc. USB2.0 Hub | | | +-4 Hub (480 Mb/s, 100mA) | | USB 2.0 Hub | | | +-5 (480 Mb/s, 100mA) | VIA Technologies Inc. USB 2.0 BILLBOARD 0000000000000001 | +-3 Hub (5 Gb/s, 0mA) | VIA Labs, Inc. USB3.0 Hub | +-6 Mass Storage (5 Gb/s, 224mA) JMicron External Disk 3.0 DB12345678A2 => usb reset resetting USB... Bus usb@fe380000: USB EHCI 1.00 Bus usb@fe3c0000: USB EHCI 1.00 Bus dwc3: usb maximum-speed not found Register 2000140 NbrPorts 2 Starting the controller USB XHCI 1.10 scanning bus usb@fe380000 for devices... 1 USB Device(s) found scanning bus usb@fe3c0000 for devices... 2 USB Device(s) found scanning bus dwc3 for devices... 6 USB Device(s) found scanning usb for storage devices... 1 Storage Device(s) found Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-05-26 03:35:16 +00:00
CONFIG_MISC=y
configs: roc-pc-rk3399: Enable rockchip efuse support Enable efuse support which allows reading of the cpuid#, serial# and also generates a unique mac address from the board's serial. Signed-off-by: Christopher Obbard <chris.obbard@collabora.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-11-23 13:59:02 +00:00
CONFIG_ROCKCHIP_EFUSE=y
rockchip: rk3399: Add ROC-RK3399-PC support Add initial support for ROC-RK3399-PC board. Specification - Rockchip RK3399 - LPDDR4 4GiB - eMMC slot - SD card slot - RTL8211E 1Gbps - HDMI Out, DP, MIPI DSI/CSI, EDP - PCIe M.2 - USB 2.0, USB-3.0 - USB C Type Commit details of rk3399-roc-pc.dts sync from Linux v5.2: "arm64: dts: rockchip: add support for ROC-RK3399-PC board" (sha1: 8bb878cf20ae10809c36db96993bfce7026d062b) Signed-off-by: Levin Du <djw@t-chip.com.cn> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-07-26 07:43:54 +00:00
CONFIG_MMC_DW=y
CONFIG_MMC_DW_ROCKCHIP=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_ROCKCHIP=y
rockchip: rk3399-roc-pc: default to SPI bus 1 for SPI-flash SPI flash on this board is located on bus 1, default to using bus 1 for SPI flash on both rk3399-roc-pc and -mezzanine, and stop aliasing it to bus 0. Signed-off-by: Hugh Cole-Baker <sigmaris@gmail.com> Suggested-by: Simon Glass <sjg@chromium.org> Fixes: c4cea2bb ("rockchip: Enable building a SPI ROM image on bob") Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
2020-11-22 13:03:45 +00:00
CONFIG_SF_DEFAULT_BUS=1
configs: Resync with savedefconfig Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
2020-02-06 18:42:52 +00:00
CONFIG_SPI_FLASH_WINBOND=y
rockchip: rk3399: Add ROC-RK3399-PC support Add initial support for ROC-RK3399-PC board. Specification - Rockchip RK3399 - LPDDR4 4GiB - eMMC slot - SD card slot - RTL8211E 1Gbps - HDMI Out, DP, MIPI DSI/CSI, EDP - PCIe M.2 - USB 2.0, USB-3.0 - USB C Type Commit details of rk3399-roc-pc.dts sync from Linux v5.2: "arm64: dts: rockchip: add support for ROC-RK3399-PC board" (sha1: 8bb878cf20ae10809c36db96993bfce7026d062b) Signed-off-by: Levin Du <djw@t-chip.com.cn> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-07-26 07:43:54 +00:00
CONFIG_ETH_DESIGNWARE=y
CONFIG_GMAC_ROCKCHIP=y
roc-rk3399-pc: Enable USB3.0 Host Enable USB3.0 Host support for ROC-RK3399-PC boards. Tested USB3.0 SSD on Type C1 port on board. => usb start starting USB... Bus usb@fe380000: USB EHCI 1.00 Bus usb@fe3c0000: USB EHCI 1.00 Bus dwc3: usb maximum-speed not found Register 2000140 NbrPorts 2 Starting the controller USB XHCI 1.10 scanning bus usb@fe380000 for devices... 1 USB Device(s) found scanning bus usb@fe3c0000 for devices... 2 USB Device(s) found scanning bus dwc3 for devices... 6 USB Device(s) found scanning usb for storage devices... 1 Storage Device(s) found => usb tree USB device tree: 1 Hub (480 Mb/s, 0mA) u-boot EHCI Host Controller 1 Hub (480 Mb/s, 0mA) | u-boot EHCI Host Controller | +-2 Hub (480 Mb/s, 100mA) USB 2.0 Hub [MTT] 1 Hub (5 Gb/s, 0mA) | U-Boot XHCI Host Controller | +-2 Hub (480 Mb/s, 0mA) | | VIA Labs, Inc. USB2.0 Hub | | | +-4 Hub (480 Mb/s, 100mA) | | USB 2.0 Hub | | | +-5 (480 Mb/s, 100mA) | VIA Technologies Inc. USB 2.0 BILLBOARD 0000000000000001 | +-3 Hub (5 Gb/s, 0mA) | VIA Labs, Inc. USB3.0 Hub | +-6 Mass Storage (5 Gb/s, 224mA) JMicron External Disk 3.0 DB12345678A2 => usb reset resetting USB... Bus usb@fe380000: USB EHCI 1.00 Bus usb@fe3c0000: USB EHCI 1.00 Bus dwc3: usb maximum-speed not found Register 2000140 NbrPorts 2 Starting the controller USB XHCI 1.10 scanning bus usb@fe380000 for devices... 1 USB Device(s) found scanning bus usb@fe3c0000 for devices... 2 USB Device(s) found scanning bus dwc3 for devices... 6 USB Device(s) found scanning usb for storage devices... 1 Storage Device(s) found Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-05-26 03:35:16 +00:00
CONFIG_PHY_ROCKCHIP_INNO_USB2=y
CONFIG_PHY_ROCKCHIP_TYPEC=y
rockchip: rk3399: Add ROC-RK3399-PC support Add initial support for ROC-RK3399-PC board. Specification - Rockchip RK3399 - LPDDR4 4GiB - eMMC slot - SD card slot - RTL8211E 1Gbps - HDMI Out, DP, MIPI DSI/CSI, EDP - PCIe M.2 - USB 2.0, USB-3.0 - USB C Type Commit details of rk3399-roc-pc.dts sync from Linux v5.2: "arm64: dts: rockchip: add support for ROC-RK3399-PC board" (sha1: 8bb878cf20ae10809c36db96993bfce7026d062b) Signed-off-by: Levin Du <djw@t-chip.com.cn> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-07-26 07:43:54 +00:00
CONFIG_PMIC_RK8XX=y
CONFIG_REGULATOR_PWM=y
CONFIG_REGULATOR_RK8XX=y
CONFIG_PWM_ROCKCHIP=y
rockchip: roc-rk3399-pc: Disable RAM_ROCKCHIP_DEBUG Disable ram rockchip debug driver for roc-rk3399-pc boards since we have verified ram in many instances with respective U-Boot versions. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-07-13 20:06:35 +00:00
# CONFIG_RAM_ROCKCHIP_DEBUG is not set
ram: rockchip: Add common ddr type configs We have common ddr types in rockchip or in general. So use the common ddr type names instead of per Rockchip SoC to avoid confusion. The respective ddr type names will use on the associated ddr SoC driver as these drivers are built per SoC at a time. Signed-off-by: Jagan Teki <jagan@edgeble.ai> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-12-14 17:50:48 +00:00
CONFIG_RAM_ROCKCHIP_LPDDR4=y
configs:rockchip:roc-rk3399-pc:Enable more configs This patch enables the following: 1) use preboot configuration to enable usb devices. 2) Enable USB configs so keyboards and other USB devices work, update the number of ports of the usb root hub. - with this addition the updated USB device Tree: 1 Hub (12 Mb/s, 0mA) U-Boot Root Hub 1 Hub (12 Mb/s, 0mA) | U-Boot Root Hub | +-2 Hub (12 Mb/s, 100mA) USB 2.0 Hub [MTT] 1 Hub (5 Gb/s, 0mA) U-Boot XHCI Host Controller 3) enable crypto RNG support. 4) Change SPI speed and frequency: - increase the maximum SPI slave device speed, SPI flash max frequency for the environment from 10Mhz to 30MHz. - performance stats for speed update from 10MHz to 30MHz: with 10Mhz speed update: => sf update 0x300000 0x800000 0x400000 4194304 bytes written, 0 bytes skipped in 36.819s, speed 119837 B/s with 30Mhz speed update: => sf update 0x300000 0x800000 0x400000 4194304 bytes written, 0 bytes skipped in 20.319s, speed 220752 B/s Signed-off-by: Manoj Sai <abbaraju.manojsai@amarulasolutions.com> Signed-off-by: Da Xue <da.xue@libretech.co> Signed-off-by: dsx724 <da@lessconfused.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-09-15 07:23:19 +00:00
CONFIG_DM_RNG=y
CONFIG_RNG_ROCKCHIP=y
rockchip: rk3399: Add ROC-RK3399-PC support Add initial support for ROC-RK3399-PC board. Specification - Rockchip RK3399 - LPDDR4 4GiB - eMMC slot - SD card slot - RTL8211E 1Gbps - HDMI Out, DP, MIPI DSI/CSI, EDP - PCIe M.2 - USB 2.0, USB-3.0 - USB C Type Commit details of rk3399-roc-pc.dts sync from Linux v5.2: "arm64: dts: rockchip: add support for ROC-RK3399-PC board" (sha1: 8bb878cf20ae10809c36db96993bfce7026d062b) Signed-off-by: Levin Du <djw@t-chip.com.cn> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-07-26 07:43:54 +00:00
CONFIG_BAUDRATE=1500000
CONFIG_DEBUG_UART_SHIFT=2
Convert CONFIG_SYS_NS16550_MEM32 et al to Kconfig This converts the following to Kconfig: CONFIG_SPL_NS16550_MIN_FUNCTIONS CONFIG_SYS_NS16550_MEM32 CONFIG_SYS_NS16550_PORT_MAPPED CONFIG_SYS_NS16550_REG_SIZE CONFIG_SYS_NS16550_SERIAL To do this we also introduce CONFIG_SPL_SYS_NS16550_SERIAL so that platforms can enable the legacy driver here for SPL. Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-04 14:39:03 +00:00
CONFIG_SYS_NS16550_MEM32=y
roc-pc-rk3399: Enable SPI Flash Enable winbond SPI flash for ROC-PC-RK3399 board. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-12-21 07:54:38 +00:00
CONFIG_ROCKCHIP_SPI=y
configs: Resync with savedefconfig Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
2020-02-06 18:42:52 +00:00
CONFIG_SYSRESET=y
rockchip: rk3399: Add ROC-RK3399-PC support Add initial support for ROC-RK3399-PC board. Specification - Rockchip RK3399 - LPDDR4 4GiB - eMMC slot - SD card slot - RTL8211E 1Gbps - HDMI Out, DP, MIPI DSI/CSI, EDP - PCIe M.2 - USB 2.0, USB-3.0 - USB C Type Commit details of rk3399-roc-pc.dts sync from Linux v5.2: "arm64: dts: rockchip: add support for ROC-RK3399-PC board" (sha1: 8bb878cf20ae10809c36db96993bfce7026d062b) Signed-off-by: Levin Du <djw@t-chip.com.cn> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-07-26 07:43:54 +00:00
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_GENERIC=y
configs:rockchip:roc-rk3399-pc:Enable more configs This patch enables the following: 1) use preboot configuration to enable usb devices. 2) Enable USB configs so keyboards and other USB devices work, update the number of ports of the usb root hub. - with this addition the updated USB device Tree: 1 Hub (12 Mb/s, 0mA) U-Boot Root Hub 1 Hub (12 Mb/s, 0mA) | U-Boot Root Hub | +-2 Hub (12 Mb/s, 100mA) USB 2.0 Hub [MTT] 1 Hub (5 Gb/s, 0mA) U-Boot XHCI Host Controller 3) enable crypto RNG support. 4) Change SPI speed and frequency: - increase the maximum SPI slave device speed, SPI flash max frequency for the environment from 10Mhz to 30MHz. - performance stats for speed update from 10MHz to 30MHz: with 10Mhz speed update: => sf update 0x300000 0x800000 0x400000 4194304 bytes written, 0 bytes skipped in 36.819s, speed 119837 B/s with 30Mhz speed update: => sf update 0x300000 0x800000 0x400000 4194304 bytes written, 0 bytes skipped in 20.319s, speed 220752 B/s Signed-off-by: Manoj Sai <abbaraju.manojsai@amarulasolutions.com> Signed-off-by: Da Xue <da.xue@libretech.co> Signed-off-by: dsx724 <da@lessconfused.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-09-15 07:23:19 +00:00
CONFIG_USB_OHCI_HCD=y
CONFIG_USB_OHCI_GENERIC=y
roc-rk3399-pc: Enable USB3.0 Host Enable USB3.0 Host support for ROC-RK3399-PC boards. Tested USB3.0 SSD on Type C1 port on board. => usb start starting USB... Bus usb@fe380000: USB EHCI 1.00 Bus usb@fe3c0000: USB EHCI 1.00 Bus dwc3: usb maximum-speed not found Register 2000140 NbrPorts 2 Starting the controller USB XHCI 1.10 scanning bus usb@fe380000 for devices... 1 USB Device(s) found scanning bus usb@fe3c0000 for devices... 2 USB Device(s) found scanning bus dwc3 for devices... 6 USB Device(s) found scanning usb for storage devices... 1 Storage Device(s) found => usb tree USB device tree: 1 Hub (480 Mb/s, 0mA) u-boot EHCI Host Controller 1 Hub (480 Mb/s, 0mA) | u-boot EHCI Host Controller | +-2 Hub (480 Mb/s, 100mA) USB 2.0 Hub [MTT] 1 Hub (5 Gb/s, 0mA) | U-Boot XHCI Host Controller | +-2 Hub (480 Mb/s, 0mA) | | VIA Labs, Inc. USB2.0 Hub | | | +-4 Hub (480 Mb/s, 100mA) | | USB 2.0 Hub | | | +-5 (480 Mb/s, 100mA) | VIA Technologies Inc. USB 2.0 BILLBOARD 0000000000000001 | +-3 Hub (5 Gb/s, 0mA) | VIA Labs, Inc. USB3.0 Hub | +-6 Mass Storage (5 Gb/s, 224mA) JMicron External Disk 3.0 DB12345678A2 => usb reset resetting USB... Bus usb@fe380000: USB EHCI 1.00 Bus usb@fe3c0000: USB EHCI 1.00 Bus dwc3: usb maximum-speed not found Register 2000140 NbrPorts 2 Starting the controller USB XHCI 1.10 scanning bus usb@fe380000 for devices... 1 USB Device(s) found scanning bus usb@fe3c0000 for devices... 2 USB Device(s) found scanning bus dwc3 for devices... 6 USB Device(s) found scanning usb for storage devices... 1 Storage Device(s) found Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-05-26 03:35:16 +00:00
CONFIG_USB_DWC3=y
CONFIG_USB_DWC3_GENERIC=y
configs: Resync with savedefconfig Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
2020-04-28 20:15:47 +00:00
CONFIG_USB_KEYBOARD=y
rockchip: rk3399: Add ROC-RK3399-PC support Add initial support for ROC-RK3399-PC board. Specification - Rockchip RK3399 - LPDDR4 4GiB - eMMC slot - SD card slot - RTL8211E 1Gbps - HDMI Out, DP, MIPI DSI/CSI, EDP - PCIe M.2 - USB 2.0, USB-3.0 - USB C Type Commit details of rk3399-roc-pc.dts sync from Linux v5.2: "arm64: dts: rockchip: add support for ROC-RK3399-PC board" (sha1: 8bb878cf20ae10809c36db96993bfce7026d062b) Signed-off-by: Levin Du <djw@t-chip.com.cn> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-07-26 07:43:54 +00:00
CONFIG_USB_HOST_ETHER=y
CONFIG_USB_ETHER_ASIX=y
CONFIG_USB_ETHER_ASIX88179=y
CONFIG_USB_ETHER_MCS7830=y
CONFIG_USB_ETHER_RTL8152=y
CONFIG_USB_ETHER_SMSC95XX=y
configs: Resync with savedefconfig Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
2021-07-27 01:10:37 +00:00
CONFIG_USB_GADGET=y
video: Rename CONFIG_DM_VIDEO to CONFIG_VIDEO Now that all the old code is gone, rename this option. Driver model migration is now complete. Signed-off-by: Simon Glass <sjg@chromium.org>
2022-10-18 13:46:31 +00:00
CONFIG_VIDEO=y
rockchip: Enable HDMI output on rk3399 board w/ HDMI Enable config options and console setting to respective rk3399 board for HDMI output. Boards supported and tested on this patch are: - NanoPc T4 - NanoPi M4 - NanoPi Neo4 - ROC-RK3399-PC - Rock960 Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Peter Robinson <pbrobinson@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-04-02 11:41:24 +00:00
CONFIG_DISPLAY=y
CONFIG_VIDEO_ROCKCHIP=y
CONFIG_DISPLAY_ROCKCHIP_HDMI=y
configs: Resync with savedefconfig Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
2020-04-28 20:15:47 +00:00
CONFIG_SPL_TINY_MEMSET=y
CONFIG_ERRNO_STR=y
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