2018-05-06 21:58:06 +00:00
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// SPDX-License-Identifier: GPL-2.0+
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2008-04-15 12:14:25 +00:00
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/*
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* Copyright (C) 2008, Guennadi Liakhovetski <lg@denx.de>
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*/
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#include <common.h>
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2021-01-18 23:58:33 +00:00
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#include <clk.h>
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2017-08-09 05:09:33 +00:00
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#include <dm.h>
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2020-05-10 17:40:05 +00:00
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#include <log.h>
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SPI API improvements
This patch gets rid of the spi_chipsel table and adds a handful of new
functions that makes the SPI layer cleaner and more flexible.
Instead of the spi_chipsel table, each board that wants to use SPI
gets to implement three hooks:
* spi_cs_activate(): Activates the chipselect for a given slave
* spi_cs_deactivate(): Deactivates the chipselect for a given slave
* spi_cs_is_valid(): Determines if the given bus/chipselect
combination can be activated.
Not all drivers may need those extra functions however. If that's the
case, the board code may just leave them out (assuming they know what
the driver needs) or rely on the linker to strip them out (assuming
--gc-sections is being used.)
To set up communication parameters for a given slave, the driver needs
to call spi_setup_slave(). This returns a pointer to an opaque
spi_slave struct which must be passed as a parameter to subsequent SPI
calls. This struct can be freed by calling spi_free_slave(), but most
driver probably don't want to do this.
Before starting one or more SPI transfers, the driver must call
spi_claim_bus() to gain exclusive access to the SPI bus and initialize
the hardware. When all transfers are done, the driver must call
spi_release_bus() to make the bus available to others, and possibly
shut down the SPI controller hardware.
spi_xfer() behaves mostly the same as before, but it now takes a
spi_slave parameter instead of a spi_chipsel function pointer. It also
got a new parameter, flags, which is used to specify chip select
behaviour. This may be extended with other flags in the future.
This patch has been build-tested on all powerpc and arm boards
involved. I have not tested NIOS since I don't have a toolchain for it
installed, so I expect some breakage there even though I've tried
fixing up everything I could find by visual inspection.
I have run-time tested this on AVR32 ATNGW100 using the atmel_spi and
DataFlash drivers posted as a follow-up. I'd like some help testing
other boards that use the existing SPI API.
But most of all, I'd like some comments on the new API. Is this stuff
usable for everyone? If not, why?
Changed in v4:
- Build fixes for various boards, drivers and commands
- Provide common struct spi_slave definition that can be extended by
drivers
- Pass a struct spi_slave * to spi_cs_activate and spi_cs_deactivate
- Make default bus and mode build-time configurable
- Override default SPI bus ID and mode on mx32ads and imx31_litekit.
Changed in v3:
- Add opaque struct spi_slave for controller-specific data associated
with a slave.
- Add spi_claim_bus() and spi_release_bus()
- Add spi_free_slave()
- spi_setup() is now called spi_setup_slave() and returns a
struct spi_slave
- soft_spi now supports four SPI modes (CPOL|CPHA)
- Add bus parameter to spi_setup_slave()
- Convert the new i.MX32 SPI driver
- Convert the new MC13783 RTC driver
Changed in v2:
- Convert the mpc8xxx_spi driver and the mpc8349emds board to the
new API.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Tested-by: Guennadi Liakhovetski <lg@denx.de>
2008-05-16 09:10:31 +00:00
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#include <malloc.h>
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2008-04-15 12:14:25 +00:00
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#include <spi.h>
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2020-02-03 14:36:16 +00:00
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#include <dm/device_compat.h>
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2020-05-10 17:40:13 +00:00
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#include <linux/bitops.h>
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2020-05-10 17:40:11 +00:00
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#include <linux/delay.h>
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2016-09-21 02:28:55 +00:00
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#include <linux/errno.h>
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2008-04-15 12:14:25 +00:00
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#include <asm/io.h>
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2011-08-21 08:45:44 +00:00
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#include <asm/gpio.h>
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2011-03-14 14:43:56 +00:00
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#include <asm/arch/imx-regs.h>
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#include <asm/arch/clock.h>
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2017-06-29 08:16:06 +00:00
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#include <asm/mach-imx/spi.h>
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2008-04-15 12:14:25 +00:00
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2017-08-09 05:09:33 +00:00
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DECLARE_GLOBAL_DATA_PTR;
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2021-01-18 23:58:32 +00:00
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/* MX35 and older is CSPI */
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#if defined(CONFIG_MX25) || defined(CONFIG_MX31) || defined(CONFIG_MX35)
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#define MXC_CSPI
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struct cspi_regs {
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u32 rxdata;
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u32 txdata;
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u32 ctrl;
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u32 intr;
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u32 dma;
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u32 stat;
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u32 period;
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u32 test;
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};
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#define MXC_CSPICTRL_EN BIT(0)
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#define MXC_CSPICTRL_MODE BIT(1)
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#define MXC_CSPICTRL_XCH BIT(2)
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#define MXC_CSPICTRL_SMC BIT(3)
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#define MXC_CSPICTRL_POL BIT(4)
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#define MXC_CSPICTRL_PHA BIT(5)
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#define MXC_CSPICTRL_SSCTL BIT(6)
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#define MXC_CSPICTRL_SSPOL BIT(7)
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#define MXC_CSPICTRL_DATARATE(x) (((x) & 0x7) << 16)
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#define MXC_CSPICTRL_RXOVF BIT(6)
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#define MXC_CSPIPERIOD_32KHZ BIT(15)
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#define MAX_SPI_BYTES 4
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#if defined(CONFIG_MX25) || defined(CONFIG_MX35)
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#define MXC_CSPICTRL_CHIPSELECT(x) (((x) & 0x3) << 12)
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#define MXC_CSPICTRL_BITCOUNT(x) (((x) & 0xfff) << 20)
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#define MXC_CSPICTRL_TC BIT(7)
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#define MXC_CSPICTRL_MAXBITS 0xfff
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#else /* MX31 */
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#define MXC_CSPICTRL_CHIPSELECT(x) (((x) & 0x3) << 24)
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#define MXC_CSPICTRL_BITCOUNT(x) (((x) & 0x1f) << 8)
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#define MXC_CSPICTRL_TC BIT(8)
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#define MXC_CSPICTRL_MAXBITS 0x1f
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#endif
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#else /* MX51 and newer is ECSPI */
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#define MXC_ECSPI
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struct cspi_regs {
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u32 rxdata;
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u32 txdata;
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u32 ctrl;
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u32 cfg;
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u32 intr;
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u32 dma;
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u32 stat;
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u32 period;
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};
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#define MXC_CSPICTRL_EN BIT(0)
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#define MXC_CSPICTRL_MODE BIT(1)
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#define MXC_CSPICTRL_XCH BIT(2)
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#define MXC_CSPICTRL_MODE_MASK (0xf << 4)
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#define MXC_CSPICTRL_CHIPSELECT(x) (((x) & 0x3) << 12)
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#define MXC_CSPICTRL_BITCOUNT(x) (((x) & 0xfff) << 20)
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#define MXC_CSPICTRL_PREDIV(x) (((x) & 0xF) << 12)
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#define MXC_CSPICTRL_POSTDIV(x) (((x) & 0xF) << 8)
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#define MXC_CSPICTRL_SELCHAN(x) (((x) & 0x3) << 18)
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#define MXC_CSPICTRL_MAXBITS 0xfff
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#define MXC_CSPICTRL_TC BIT(7)
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#define MXC_CSPICTRL_RXOVF BIT(6)
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#define MXC_CSPIPERIOD_32KHZ BIT(15)
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#define MAX_SPI_BYTES 32
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/* Bit position inside CTRL register to be associated with SS */
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#define MXC_CSPICTRL_CHAN 18
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/* Bit position inside CON register to be associated with SS */
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#define MXC_CSPICON_PHA 0 /* SCLK phase control */
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#define MXC_CSPICON_POL 4 /* SCLK polarity */
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#define MXC_CSPICON_SSPOL 12 /* SS polarity */
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#define MXC_CSPICON_CTL 20 /* inactive state of SCLK */
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#endif
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2008-04-15 12:14:25 +00:00
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#ifdef CONFIG_MX27
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/* i.MX27 has a completely wrong register layout and register definitions in the
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* datasheet, the correct one is in the Freescale's Linux driver */
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2011-06-15 01:45:45 +00:00
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#error "i.MX27 CSPI not supported due to drastic differences in register definitions" \
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2008-04-15 12:14:25 +00:00
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"See linux mxc_spi driver from Freescale for details."
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2012-01-31 07:52:03 +00:00
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#endif
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2011-01-19 22:46:30 +00:00
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spi: mxc: fix sf probe when using mxc_spi
MXC SPI driver has a feature whereas a GPIO line can be used to force CS high
across multiple transactions. This is set up by embedding the GPIO information
in the CS value:
cs = (cs | gpio << 8)
This merge of cs and gpio data into one value breaks the sf probe command:
if the use of gpio is required, invoking "sf probe <cs>" will not work, because
the CS argument doesn't have the GPIO information in it. Instead, the user must
use "sf probe <cs | gpio << 8>". For example, if bank 2 gpio 30 is used to force
cs high on cs 0, bus 0, then instead of typing "sf probe 0" the user now must
type "sf probe 15872".
This is inconsistent with the description of the sf probe command, and forces
the user to be aware of implementaiton details.
Fix this by introducing a new board function: board_spi_cs_gpio(), which will
accept a naked CS value, and provide the driver with the relevant GPIO, if one
is necessary.
Cc: Eric Nelson <eric.nelson@boundarydevices.com>
Cc: Eric Benard <eric@eukrea.com>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Tim Harvey <tharvey@gateworks.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Tom Rini <trini@ti.com>
Cc: Marek Vasut <marex@denx.de>
Reviewed-by: Marek Vasut <marex@denx.de>
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2014-08-20 12:08:50 +00:00
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__weak int board_spi_cs_gpio(unsigned bus, unsigned cs)
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{
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return -1;
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}
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2010-07-06 15:05:06 +00:00
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#define OUT MXC_GPIO_DIRECTION_OUT
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2011-01-19 22:46:33 +00:00
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#define reg_read readl
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#define reg_write(a, v) writel(v, a)
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2014-07-14 08:22:11 +00:00
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#if !defined(CONFIG_SYS_SPI_MXC_WAIT)
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#define CONFIG_SYS_SPI_MXC_WAIT (CONFIG_SYS_HZ/100) /* 10 ms */
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#endif
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2019-05-26 10:15:47 +00:00
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#define MAX_CS_COUNT 4
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SPI API improvements
This patch gets rid of the spi_chipsel table and adds a handful of new
functions that makes the SPI layer cleaner and more flexible.
Instead of the spi_chipsel table, each board that wants to use SPI
gets to implement three hooks:
* spi_cs_activate(): Activates the chipselect for a given slave
* spi_cs_deactivate(): Deactivates the chipselect for a given slave
* spi_cs_is_valid(): Determines if the given bus/chipselect
combination can be activated.
Not all drivers may need those extra functions however. If that's the
case, the board code may just leave them out (assuming they know what
the driver needs) or rely on the linker to strip them out (assuming
--gc-sections is being used.)
To set up communication parameters for a given slave, the driver needs
to call spi_setup_slave(). This returns a pointer to an opaque
spi_slave struct which must be passed as a parameter to subsequent SPI
calls. This struct can be freed by calling spi_free_slave(), but most
driver probably don't want to do this.
Before starting one or more SPI transfers, the driver must call
spi_claim_bus() to gain exclusive access to the SPI bus and initialize
the hardware. When all transfers are done, the driver must call
spi_release_bus() to make the bus available to others, and possibly
shut down the SPI controller hardware.
spi_xfer() behaves mostly the same as before, but it now takes a
spi_slave parameter instead of a spi_chipsel function pointer. It also
got a new parameter, flags, which is used to specify chip select
behaviour. This may be extended with other flags in the future.
This patch has been build-tested on all powerpc and arm boards
involved. I have not tested NIOS since I don't have a toolchain for it
installed, so I expect some breakage there even though I've tried
fixing up everything I could find by visual inspection.
I have run-time tested this on AVR32 ATNGW100 using the atmel_spi and
DataFlash drivers posted as a follow-up. I'd like some help testing
other boards that use the existing SPI API.
But most of all, I'd like some comments on the new API. Is this stuff
usable for everyone? If not, why?
Changed in v4:
- Build fixes for various boards, drivers and commands
- Provide common struct spi_slave definition that can be extended by
drivers
- Pass a struct spi_slave * to spi_cs_activate and spi_cs_deactivate
- Make default bus and mode build-time configurable
- Override default SPI bus ID and mode on mx32ads and imx31_litekit.
Changed in v3:
- Add opaque struct spi_slave for controller-specific data associated
with a slave.
- Add spi_claim_bus() and spi_release_bus()
- Add spi_free_slave()
- spi_setup() is now called spi_setup_slave() and returns a
struct spi_slave
- soft_spi now supports four SPI modes (CPOL|CPHA)
- Add bus parameter to spi_setup_slave()
- Convert the new i.MX32 SPI driver
- Convert the new MC13783 RTC driver
Changed in v2:
- Convert the mpc8xxx_spi driver and the mpc8349emds board to the
new API.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Tested-by: Guennadi Liakhovetski <lg@denx.de>
2008-05-16 09:10:31 +00:00
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struct mxc_spi_slave {
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struct spi_slave slave;
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unsigned long base;
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u32 ctrl_reg;
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2012-01-31 07:52:03 +00:00
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#if defined(MXC_ECSPI)
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2010-04-04 20:43:38 +00:00
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u32 cfg_reg;
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#endif
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2009-02-13 08:26:40 +00:00
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int gpio;
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2010-07-06 15:05:06 +00:00
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int ss_pol;
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2014-10-23 14:09:39 +00:00
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unsigned int max_hz;
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unsigned int mode;
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2017-08-09 05:09:33 +00:00
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struct gpio_desc ss;
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2019-05-26 10:15:47 +00:00
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struct gpio_desc cs_gpios[MAX_CS_COUNT];
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struct udevice *dev;
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2008-04-15 12:14:25 +00:00
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};
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SPI API improvements
This patch gets rid of the spi_chipsel table and adds a handful of new
functions that makes the SPI layer cleaner and more flexible.
Instead of the spi_chipsel table, each board that wants to use SPI
gets to implement three hooks:
* spi_cs_activate(): Activates the chipselect for a given slave
* spi_cs_deactivate(): Deactivates the chipselect for a given slave
* spi_cs_is_valid(): Determines if the given bus/chipselect
combination can be activated.
Not all drivers may need those extra functions however. If that's the
case, the board code may just leave them out (assuming they know what
the driver needs) or rely on the linker to strip them out (assuming
--gc-sections is being used.)
To set up communication parameters for a given slave, the driver needs
to call spi_setup_slave(). This returns a pointer to an opaque
spi_slave struct which must be passed as a parameter to subsequent SPI
calls. This struct can be freed by calling spi_free_slave(), but most
driver probably don't want to do this.
Before starting one or more SPI transfers, the driver must call
spi_claim_bus() to gain exclusive access to the SPI bus and initialize
the hardware. When all transfers are done, the driver must call
spi_release_bus() to make the bus available to others, and possibly
shut down the SPI controller hardware.
spi_xfer() behaves mostly the same as before, but it now takes a
spi_slave parameter instead of a spi_chipsel function pointer. It also
got a new parameter, flags, which is used to specify chip select
behaviour. This may be extended with other flags in the future.
This patch has been build-tested on all powerpc and arm boards
involved. I have not tested NIOS since I don't have a toolchain for it
installed, so I expect some breakage there even though I've tried
fixing up everything I could find by visual inspection.
I have run-time tested this on AVR32 ATNGW100 using the atmel_spi and
DataFlash drivers posted as a follow-up. I'd like some help testing
other boards that use the existing SPI API.
But most of all, I'd like some comments on the new API. Is this stuff
usable for everyone? If not, why?
Changed in v4:
- Build fixes for various boards, drivers and commands
- Provide common struct spi_slave definition that can be extended by
drivers
- Pass a struct spi_slave * to spi_cs_activate and spi_cs_deactivate
- Make default bus and mode build-time configurable
- Override default SPI bus ID and mode on mx32ads and imx31_litekit.
Changed in v3:
- Add opaque struct spi_slave for controller-specific data associated
with a slave.
- Add spi_claim_bus() and spi_release_bus()
- Add spi_free_slave()
- spi_setup() is now called spi_setup_slave() and returns a
struct spi_slave
- soft_spi now supports four SPI modes (CPOL|CPHA)
- Add bus parameter to spi_setup_slave()
- Convert the new i.MX32 SPI driver
- Convert the new MC13783 RTC driver
Changed in v2:
- Convert the mpc8xxx_spi driver and the mpc8349emds board to the
new API.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Tested-by: Guennadi Liakhovetski <lg@denx.de>
2008-05-16 09:10:31 +00:00
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static inline struct mxc_spi_slave *to_mxc_spi_slave(struct spi_slave *slave)
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{
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return container_of(slave, struct mxc_spi_slave, slave);
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}
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2008-04-15 12:14:25 +00:00
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2017-08-09 05:09:33 +00:00
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static void mxc_spi_cs_activate(struct mxc_spi_slave *mxcs)
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2010-04-04 20:43:38 +00:00
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{
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2020-06-04 15:11:53 +00:00
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#if CONFIG_IS_ENABLED(DM_SPI)
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2019-05-26 10:15:47 +00:00
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struct udevice *dev = mxcs->dev;
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2020-12-03 23:55:23 +00:00
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struct dm_spi_slave_plat *slave_plat = dev_get_parent_plat(dev);
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2019-05-26 10:15:47 +00:00
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u32 cs = slave_plat->cs;
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if (!dm_gpio_is_valid(&mxcs->cs_gpios[cs]))
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return;
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dm_gpio_set_value(&mxcs->cs_gpios[cs], 1);
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#else
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if (mxcs->gpio > 0)
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gpio_set_value(mxcs->gpio, mxcs->ss_pol);
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#endif
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2010-04-04 20:43:38 +00:00
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}
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2017-08-09 05:09:33 +00:00
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static void mxc_spi_cs_deactivate(struct mxc_spi_slave *mxcs)
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2010-04-04 20:43:38 +00:00
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{
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2020-06-04 15:11:53 +00:00
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#if CONFIG_IS_ENABLED(DM_SPI)
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2019-05-26 10:15:47 +00:00
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struct udevice *dev = mxcs->dev;
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2020-12-03 23:55:23 +00:00
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struct dm_spi_slave_plat *slave_plat = dev_get_parent_plat(dev);
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2019-05-26 10:15:47 +00:00
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u32 cs = slave_plat->cs;
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if (!dm_gpio_is_valid(&mxcs->cs_gpios[cs]))
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return;
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dm_gpio_set_value(&mxcs->cs_gpios[cs], 0);
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#else
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if (mxcs->gpio > 0)
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gpio_set_value(mxcs->gpio, !(mxcs->ss_pol));
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#endif
|
2010-04-04 20:43:38 +00:00
|
|
|
}
|
|
|
|
|
2011-01-19 22:46:32 +00:00
|
|
|
u32 get_cspi_div(u32 div)
|
|
|
|
{
|
|
|
|
int i;
|
|
|
|
|
|
|
|
for (i = 0; i < 8; i++) {
|
|
|
|
if (div <= (4 << i))
|
|
|
|
return i;
|
|
|
|
}
|
|
|
|
return i;
|
|
|
|
}
|
|
|
|
|
2012-01-31 07:52:03 +00:00
|
|
|
#ifdef MXC_CSPI
|
2014-10-23 14:09:39 +00:00
|
|
|
static s32 spi_cfg_mxc(struct mxc_spi_slave *mxcs, unsigned int cs)
|
2011-01-19 22:46:30 +00:00
|
|
|
{
|
|
|
|
unsigned int ctrl_reg;
|
2011-01-19 22:46:32 +00:00
|
|
|
u32 clk_src;
|
|
|
|
u32 div;
|
2014-10-23 14:09:39 +00:00
|
|
|
unsigned int max_hz = mxcs->max_hz;
|
|
|
|
unsigned int mode = mxcs->mode;
|
2011-01-19 22:46:32 +00:00
|
|
|
|
|
|
|
clk_src = mxc_get_clock(MXC_CSPI_CLK);
|
|
|
|
|
2012-08-10 08:51:50 +00:00
|
|
|
div = DIV_ROUND_UP(clk_src, max_hz);
|
2011-01-19 22:46:32 +00:00
|
|
|
div = get_cspi_div(div);
|
|
|
|
|
|
|
|
debug("clk %d Hz, div %d, real clk %d Hz\n",
|
|
|
|
max_hz, div, clk_src / (4 << div));
|
2011-01-19 22:46:30 +00:00
|
|
|
|
|
|
|
ctrl_reg = MXC_CSPICTRL_CHIPSELECT(cs) |
|
|
|
|
MXC_CSPICTRL_BITCOUNT(MXC_CSPICTRL_MAXBITS) |
|
2011-01-19 22:46:32 +00:00
|
|
|
MXC_CSPICTRL_DATARATE(div) |
|
2011-01-19 22:46:30 +00:00
|
|
|
MXC_CSPICTRL_EN |
|
|
|
|
#ifdef CONFIG_MX35
|
|
|
|
MXC_CSPICTRL_SSCTL |
|
|
|
|
#endif
|
|
|
|
MXC_CSPICTRL_MODE;
|
|
|
|
|
|
|
|
if (mode & SPI_CPHA)
|
|
|
|
ctrl_reg |= MXC_CSPICTRL_PHA;
|
|
|
|
if (mode & SPI_CPOL)
|
|
|
|
ctrl_reg |= MXC_CSPICTRL_POL;
|
|
|
|
if (mode & SPI_CS_HIGH)
|
|
|
|
ctrl_reg |= MXC_CSPICTRL_SSPOL;
|
|
|
|
mxcs->ctrl_reg = ctrl_reg;
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
2012-01-31 07:52:03 +00:00
|
|
|
#ifdef MXC_ECSPI
|
2014-10-23 14:09:39 +00:00
|
|
|
static s32 spi_cfg_mxc(struct mxc_spi_slave *mxcs, unsigned int cs)
|
2010-04-04 20:43:38 +00:00
|
|
|
{
|
|
|
|
u32 clk_src = mxc_get_clock(MXC_CSPI_CLK);
|
2013-05-11 05:25:54 +00:00
|
|
|
s32 reg_ctrl, reg_config;
|
2014-02-17 16:33:17 +00:00
|
|
|
u32 ss_pol = 0, sclkpol = 0, sclkpha = 0, sclkctl = 0;
|
|
|
|
u32 pre_div = 0, post_div = 0;
|
2011-01-19 22:46:33 +00:00
|
|
|
struct cspi_regs *regs = (struct cspi_regs *)mxcs->base;
|
2014-10-23 14:09:39 +00:00
|
|
|
unsigned int max_hz = mxcs->max_hz;
|
|
|
|
unsigned int mode = mxcs->mode;
|
2010-04-04 20:43:38 +00:00
|
|
|
|
2013-04-09 13:06:25 +00:00
|
|
|
/*
|
|
|
|
* Reset SPI and set all CSs to master mode, if toggling
|
|
|
|
* between slave and master mode we might see a glitch
|
|
|
|
* on the clock line
|
|
|
|
*/
|
|
|
|
reg_ctrl = MXC_CSPICTRL_MODE_MASK;
|
|
|
|
reg_write(®s->ctrl, reg_ctrl);
|
|
|
|
reg_ctrl |= MXC_CSPICTRL_EN;
|
|
|
|
reg_write(®s->ctrl, reg_ctrl);
|
2010-04-04 20:43:38 +00:00
|
|
|
|
|
|
|
if (clk_src > max_hz) {
|
2013-05-11 05:25:54 +00:00
|
|
|
pre_div = (clk_src - 1) / max_hz;
|
|
|
|
/* fls(1) = 1, fls(0x80000000) = 32, fls(16) = 5 */
|
|
|
|
post_div = fls(pre_div);
|
|
|
|
if (post_div > 4) {
|
|
|
|
post_div -= 4;
|
|
|
|
if (post_div >= 16) {
|
2010-04-04 20:43:38 +00:00
|
|
|
printf("Error: no divider for the freq: %d\n",
|
|
|
|
max_hz);
|
|
|
|
return -1;
|
|
|
|
}
|
2013-05-11 05:25:54 +00:00
|
|
|
pre_div >>= post_div;
|
|
|
|
} else {
|
|
|
|
post_div = 0;
|
2010-04-04 20:43:38 +00:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
debug("pre_div = %d, post_div=%d\n", pre_div, post_div);
|
|
|
|
reg_ctrl = (reg_ctrl & ~MXC_CSPICTRL_SELCHAN(3)) |
|
|
|
|
MXC_CSPICTRL_SELCHAN(cs);
|
|
|
|
reg_ctrl = (reg_ctrl & ~MXC_CSPICTRL_PREDIV(0x0F)) |
|
|
|
|
MXC_CSPICTRL_PREDIV(pre_div);
|
|
|
|
reg_ctrl = (reg_ctrl & ~MXC_CSPICTRL_POSTDIV(0x0F)) |
|
|
|
|
MXC_CSPICTRL_POSTDIV(post_div);
|
|
|
|
|
|
|
|
if (mode & SPI_CS_HIGH)
|
|
|
|
ss_pol = 1;
|
|
|
|
|
2014-02-17 16:33:17 +00:00
|
|
|
if (mode & SPI_CPOL) {
|
2010-04-04 20:43:38 +00:00
|
|
|
sclkpol = 1;
|
2014-02-17 16:33:17 +00:00
|
|
|
sclkctl = 1;
|
|
|
|
}
|
2010-04-04 20:43:38 +00:00
|
|
|
|
|
|
|
if (mode & SPI_CPHA)
|
|
|
|
sclkpha = 1;
|
|
|
|
|
2011-01-19 22:46:33 +00:00
|
|
|
reg_config = reg_read(®s->cfg);
|
2010-04-04 20:43:38 +00:00
|
|
|
|
|
|
|
/*
|
|
|
|
* Configuration register setup
|
2011-01-19 22:46:30 +00:00
|
|
|
* The MX51 supports different setup for each SS
|
2010-04-04 20:43:38 +00:00
|
|
|
*/
|
|
|
|
reg_config = (reg_config & ~(1 << (cs + MXC_CSPICON_SSPOL))) |
|
|
|
|
(ss_pol << (cs + MXC_CSPICON_SSPOL));
|
|
|
|
reg_config = (reg_config & ~(1 << (cs + MXC_CSPICON_POL))) |
|
|
|
|
(sclkpol << (cs + MXC_CSPICON_POL));
|
2014-02-17 16:33:17 +00:00
|
|
|
reg_config = (reg_config & ~(1 << (cs + MXC_CSPICON_CTL))) |
|
|
|
|
(sclkctl << (cs + MXC_CSPICON_CTL));
|
2010-04-04 20:43:38 +00:00
|
|
|
reg_config = (reg_config & ~(1 << (cs + MXC_CSPICON_PHA))) |
|
|
|
|
(sclkpha << (cs + MXC_CSPICON_PHA));
|
|
|
|
|
|
|
|
debug("reg_ctrl = 0x%x\n", reg_ctrl);
|
2011-01-19 22:46:33 +00:00
|
|
|
reg_write(®s->ctrl, reg_ctrl);
|
2010-04-04 20:43:38 +00:00
|
|
|
debug("reg_config = 0x%x\n", reg_config);
|
2011-01-19 22:46:33 +00:00
|
|
|
reg_write(®s->cfg, reg_config);
|
2010-04-04 20:43:38 +00:00
|
|
|
|
|
|
|
/* save config register and control register */
|
|
|
|
mxcs->ctrl_reg = reg_ctrl;
|
|
|
|
mxcs->cfg_reg = reg_config;
|
|
|
|
|
|
|
|
/* clear interrupt reg */
|
2011-01-19 22:46:33 +00:00
|
|
|
reg_write(®s->intr, 0);
|
|
|
|
reg_write(®s->stat, MXC_CSPICTRL_TC | MXC_CSPICTRL_RXOVF);
|
2010-04-04 20:43:38 +00:00
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
2017-08-09 05:09:33 +00:00
|
|
|
int spi_xchg_single(struct mxc_spi_slave *mxcs, unsigned int bitlen,
|
2010-08-20 10:05:03 +00:00
|
|
|
const u8 *dout, u8 *din, unsigned long flags)
|
2008-04-15 12:14:25 +00:00
|
|
|
{
|
2013-06-14 13:13:32 +00:00
|
|
|
int nbytes = DIV_ROUND_UP(bitlen, 8);
|
2010-08-20 10:05:03 +00:00
|
|
|
u32 data, cnt, i;
|
2011-01-19 22:46:33 +00:00
|
|
|
struct cspi_regs *regs = (struct cspi_regs *)mxcs->base;
|
2014-07-14 08:22:11 +00:00
|
|
|
u32 ts;
|
|
|
|
int status;
|
2008-04-15 12:14:25 +00:00
|
|
|
|
spi: mxc_spi: Fix build warning on ARM64 platforms
When building mxc_spi driver on ARM64 platforms, get below build warnings.
Fix it in this patch.
In file included from include/common.h:48:0,
from drivers/spi/mxc_spi.c:9:
drivers/spi/mxc_spi.c: In function ‘spi_xchg_single’:
drivers/spi/mxc_spi.c:232:21: warning: cast from pointer to integer of
different size [-Wpointer-to-int-cast]
_func_, bitlen, (u32)dout, (u32)din);
^
include/log.h:135:26: note: in definition of macro ‘debug_cond’
printf(pr_fmt(fmt), ##args); \
^~~~
drivers/spi/mxc_spi.c:231:2: note: in expansion of macro ‘debug’
debug("%s: bitlen %d dout 0x%x din 0x%x\n",
^~~~~
drivers/spi/mxc_spi.c:232:32: warning: cast from pointer to integer of
different size [-Wpointer-to-int-cast]
_func_, bitlen, (u32)dout, (u32)din);
^
include/log.h:135:26: note: in definition of macro ‘debug_cond’
printf(pr_fmt(fmt), ##args); \
^~~~
drivers/spi/mxc_spi.c:231:2: note: in expansion of macro ‘debug’
debug("%s: bitlen %d dout 0x%x din 0x%x\n",
^~~~~
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2019-01-04 09:26:00 +00:00
|
|
|
debug("%s: bitlen %d dout 0x%lx din 0x%lx\n",
|
|
|
|
__func__, bitlen, (ulong)dout, (ulong)din);
|
2010-04-04 20:43:38 +00:00
|
|
|
|
|
|
|
mxcs->ctrl_reg = (mxcs->ctrl_reg &
|
|
|
|
~MXC_CSPICTRL_BITCOUNT(MXC_CSPICTRL_MAXBITS)) |
|
2009-02-06 23:09:12 +00:00
|
|
|
MXC_CSPICTRL_BITCOUNT(bitlen - 1);
|
2008-04-15 12:14:25 +00:00
|
|
|
|
2011-01-19 22:46:33 +00:00
|
|
|
reg_write(®s->ctrl, mxcs->ctrl_reg | MXC_CSPICTRL_EN);
|
2012-01-31 07:52:03 +00:00
|
|
|
#ifdef MXC_ECSPI
|
2011-01-19 22:46:33 +00:00
|
|
|
reg_write(®s->cfg, mxcs->cfg_reg);
|
2010-04-04 20:43:38 +00:00
|
|
|
#endif
|
2008-04-15 12:14:25 +00:00
|
|
|
|
2010-04-04 20:43:38 +00:00
|
|
|
/* Clear interrupt register */
|
2011-01-19 22:46:33 +00:00
|
|
|
reg_write(®s->stat, MXC_CSPICTRL_TC | MXC_CSPICTRL_RXOVF);
|
2009-02-13 08:26:40 +00:00
|
|
|
|
2010-08-20 10:05:03 +00:00
|
|
|
/*
|
|
|
|
* The SPI controller works only with words,
|
|
|
|
* check if less than a word is sent.
|
|
|
|
* Access to the FIFO is only 32 bit
|
|
|
|
*/
|
|
|
|
if (bitlen % 32) {
|
|
|
|
data = 0;
|
|
|
|
cnt = (bitlen % 32) / 8;
|
|
|
|
if (dout) {
|
|
|
|
for (i = 0; i < cnt; i++) {
|
|
|
|
data = (data << 8) | (*dout++ & 0xFF);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
debug("Sending SPI 0x%x\n", data);
|
|
|
|
|
2011-01-19 22:46:33 +00:00
|
|
|
reg_write(®s->txdata, data);
|
2010-08-20 10:05:03 +00:00
|
|
|
nbytes -= cnt;
|
|
|
|
}
|
|
|
|
|
|
|
|
data = 0;
|
|
|
|
|
|
|
|
while (nbytes > 0) {
|
|
|
|
data = 0;
|
|
|
|
if (dout) {
|
|
|
|
/* Buffer is not 32-bit aligned */
|
|
|
|
if ((unsigned long)dout & 0x03) {
|
|
|
|
data = 0;
|
2011-01-20 07:53:06 +00:00
|
|
|
for (i = 0; i < 4; i++)
|
2010-08-20 10:05:03 +00:00
|
|
|
data = (data << 8) | (*dout++ & 0xFF);
|
|
|
|
} else {
|
|
|
|
data = *(u32 *)dout;
|
|
|
|
data = cpu_to_be32(data);
|
2013-10-15 18:35:09 +00:00
|
|
|
dout += 4;
|
2010-08-20 10:05:03 +00:00
|
|
|
}
|
|
|
|
}
|
|
|
|
debug("Sending SPI 0x%x\n", data);
|
2011-01-19 22:46:33 +00:00
|
|
|
reg_write(®s->txdata, data);
|
2010-08-20 10:05:03 +00:00
|
|
|
nbytes -= 4;
|
|
|
|
}
|
2008-04-15 12:14:25 +00:00
|
|
|
|
2010-04-04 20:43:38 +00:00
|
|
|
/* FIFO is written, now starts the transfer setting the XCH bit */
|
2011-01-19 22:46:33 +00:00
|
|
|
reg_write(®s->ctrl, mxcs->ctrl_reg |
|
2010-04-04 20:43:38 +00:00
|
|
|
MXC_CSPICTRL_EN | MXC_CSPICTRL_XCH);
|
2008-04-15 12:14:25 +00:00
|
|
|
|
2014-07-14 08:22:11 +00:00
|
|
|
ts = get_timer(0);
|
|
|
|
status = reg_read(®s->stat);
|
2010-04-04 20:43:38 +00:00
|
|
|
/* Wait until the TC (Transfer completed) bit is set */
|
2014-07-14 08:22:11 +00:00
|
|
|
while ((status & MXC_CSPICTRL_TC) == 0) {
|
|
|
|
if (get_timer(ts) > CONFIG_SYS_SPI_MXC_WAIT) {
|
|
|
|
printf("spi_xchg_single: Timeout!\n");
|
|
|
|
return -1;
|
|
|
|
}
|
|
|
|
status = reg_read(®s->stat);
|
|
|
|
}
|
2008-04-15 12:14:25 +00:00
|
|
|
|
2010-04-04 20:43:38 +00:00
|
|
|
/* Transfer completed, clear any pending request */
|
2011-01-19 22:46:33 +00:00
|
|
|
reg_write(®s->stat, MXC_CSPICTRL_TC | MXC_CSPICTRL_RXOVF);
|
2010-04-04 20:43:38 +00:00
|
|
|
|
2013-06-14 13:13:32 +00:00
|
|
|
nbytes = DIV_ROUND_UP(bitlen, 8);
|
2010-04-04 20:43:38 +00:00
|
|
|
|
2010-08-20 10:05:03 +00:00
|
|
|
cnt = nbytes % 32;
|
2010-04-04 20:43:38 +00:00
|
|
|
|
2010-08-20 10:05:03 +00:00
|
|
|
if (bitlen % 32) {
|
2011-01-19 22:46:33 +00:00
|
|
|
data = reg_read(®s->rxdata);
|
2010-08-20 10:05:03 +00:00
|
|
|
cnt = (bitlen % 32) / 8;
|
2011-01-20 07:53:06 +00:00
|
|
|
data = cpu_to_be32(data) >> ((sizeof(data) - cnt) * 8);
|
2010-08-20 10:05:03 +00:00
|
|
|
debug("SPI Rx unaligned: 0x%x\n", data);
|
|
|
|
if (din) {
|
2011-01-20 07:53:06 +00:00
|
|
|
memcpy(din, &data, cnt);
|
|
|
|
din += cnt;
|
2010-08-20 10:05:03 +00:00
|
|
|
}
|
|
|
|
nbytes -= cnt;
|
|
|
|
}
|
|
|
|
|
|
|
|
while (nbytes > 0) {
|
|
|
|
u32 tmp;
|
2011-01-19 22:46:33 +00:00
|
|
|
tmp = reg_read(®s->rxdata);
|
2010-08-20 10:05:03 +00:00
|
|
|
data = cpu_to_be32(tmp);
|
|
|
|
debug("SPI Rx: 0x%x 0x%x\n", tmp, data);
|
linux/kernel.h: sync min, max, min3, max3 macros with Linux
U-Boot has never cared about the type when we get max/min of two
values, but Linux Kernel does. This commit gets min, max, min3, max3
macros synced with the kernel introducing type checks.
Many of references of those macros must be fixed to suppress warnings.
We have two options:
- Use min, max, min3, max3 only when the arguments have the same type
(or add casts to the arguments)
- Use min_t/max_t instead with the appropriate type for the first
argument
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Pavel Machek <pavel@denx.de>
Acked-by: Lukasz Majewski <l.majewski@samsung.com>
Tested-by: Lukasz Majewski <l.majewski@samsung.com>
[trini: Fixup arch/blackfin/lib/string.c]
Signed-off-by: Tom Rini <trini@ti.com>
2014-11-06 18:03:31 +00:00
|
|
|
cnt = min_t(u32, nbytes, sizeof(data));
|
2010-08-20 10:05:03 +00:00
|
|
|
if (din) {
|
|
|
|
memcpy(din, &data, cnt);
|
|
|
|
din += cnt;
|
|
|
|
}
|
|
|
|
nbytes -= cnt;
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
2009-02-13 08:26:40 +00:00
|
|
|
|
2008-04-15 12:14:25 +00:00
|
|
|
}
|
|
|
|
|
2017-08-09 05:09:33 +00:00
|
|
|
static int mxc_spi_xfer_internal(struct mxc_spi_slave *mxcs,
|
|
|
|
unsigned int bitlen, const void *dout,
|
|
|
|
void *din, unsigned long flags)
|
2008-04-15 12:14:25 +00:00
|
|
|
{
|
2013-06-14 13:13:32 +00:00
|
|
|
int n_bytes = DIV_ROUND_UP(bitlen, 8);
|
2010-08-20 10:05:03 +00:00
|
|
|
int n_bits;
|
|
|
|
int ret;
|
|
|
|
u32 blk_size;
|
|
|
|
u8 *p_outbuf = (u8 *)dout;
|
|
|
|
u8 *p_inbuf = (u8 *)din;
|
2008-04-15 12:14:25 +00:00
|
|
|
|
2017-08-09 05:09:33 +00:00
|
|
|
if (!mxcs)
|
|
|
|
return -EINVAL;
|
2008-04-15 12:14:25 +00:00
|
|
|
|
2010-08-20 10:05:03 +00:00
|
|
|
if (flags & SPI_XFER_BEGIN)
|
2017-08-09 05:09:33 +00:00
|
|
|
mxc_spi_cs_activate(mxcs);
|
2010-08-20 10:05:03 +00:00
|
|
|
|
|
|
|
while (n_bytes > 0) {
|
|
|
|
if (n_bytes < MAX_SPI_BYTES)
|
|
|
|
blk_size = n_bytes;
|
|
|
|
else
|
|
|
|
blk_size = MAX_SPI_BYTES;
|
|
|
|
|
|
|
|
n_bits = blk_size * 8;
|
|
|
|
|
2017-08-09 05:09:33 +00:00
|
|
|
ret = spi_xchg_single(mxcs, n_bits, p_outbuf, p_inbuf, 0);
|
2010-08-20 10:05:03 +00:00
|
|
|
|
|
|
|
if (ret)
|
|
|
|
return ret;
|
|
|
|
if (dout)
|
|
|
|
p_outbuf += blk_size;
|
|
|
|
if (din)
|
|
|
|
p_inbuf += blk_size;
|
|
|
|
n_bytes -= blk_size;
|
2010-02-09 21:05:39 +00:00
|
|
|
}
|
|
|
|
|
2010-08-20 10:05:03 +00:00
|
|
|
if (flags & SPI_XFER_END) {
|
2017-08-09 05:09:33 +00:00
|
|
|
mxc_spi_cs_deactivate(mxcs);
|
2009-02-06 23:09:12 +00:00
|
|
|
}
|
2008-04-15 12:14:25 +00:00
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2017-08-09 05:09:33 +00:00
|
|
|
static int mxc_spi_claim_bus_internal(struct mxc_spi_slave *mxcs, int cs)
|
|
|
|
{
|
|
|
|
struct cspi_regs *regs = (struct cspi_regs *)mxcs->base;
|
|
|
|
int ret;
|
|
|
|
|
|
|
|
reg_write(®s->rxdata, 1);
|
|
|
|
udelay(1);
|
|
|
|
ret = spi_cfg_mxc(mxcs, cs);
|
|
|
|
if (ret) {
|
|
|
|
printf("mxc_spi: cannot setup SPI controller\n");
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
reg_write(®s->period, MXC_CSPIPERIOD_32KHZ);
|
|
|
|
reg_write(®s->intr, 0);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2020-06-04 15:11:53 +00:00
|
|
|
#if !CONFIG_IS_ENABLED(DM_SPI)
|
2017-08-09 05:09:33 +00:00
|
|
|
int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout,
|
|
|
|
void *din, unsigned long flags)
|
|
|
|
{
|
|
|
|
struct mxc_spi_slave *mxcs = to_mxc_spi_slave(slave);
|
|
|
|
|
|
|
|
return mxc_spi_xfer_internal(mxcs, bitlen, dout, din, flags);
|
|
|
|
}
|
|
|
|
|
spi: mxc: fix sf probe when using mxc_spi
MXC SPI driver has a feature whereas a GPIO line can be used to force CS high
across multiple transactions. This is set up by embedding the GPIO information
in the CS value:
cs = (cs | gpio << 8)
This merge of cs and gpio data into one value breaks the sf probe command:
if the use of gpio is required, invoking "sf probe <cs>" will not work, because
the CS argument doesn't have the GPIO information in it. Instead, the user must
use "sf probe <cs | gpio << 8>". For example, if bank 2 gpio 30 is used to force
cs high on cs 0, bus 0, then instead of typing "sf probe 0" the user now must
type "sf probe 15872".
This is inconsistent with the description of the sf probe command, and forces
the user to be aware of implementaiton details.
Fix this by introducing a new board function: board_spi_cs_gpio(), which will
accept a naked CS value, and provide the driver with the relevant GPIO, if one
is necessary.
Cc: Eric Nelson <eric.nelson@boundarydevices.com>
Cc: Eric Benard <eric@eukrea.com>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Tim Harvey <tharvey@gateworks.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Tom Rini <trini@ti.com>
Cc: Marek Vasut <marex@denx.de>
Reviewed-by: Marek Vasut <marex@denx.de>
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2014-08-20 12:08:50 +00:00
|
|
|
/*
|
|
|
|
* Some SPI devices require active chip-select over multiple
|
|
|
|
* transactions, we achieve this using a GPIO. Still, the SPI
|
|
|
|
* controller has to be configured to use one of its own chipselects.
|
|
|
|
* To use this feature you have to implement board_spi_cs_gpio() to assign
|
|
|
|
* a gpio value for each cs (-1 if cs doesn't need to use gpio).
|
|
|
|
* You must use some unused on this SPI controller cs between 0 and 3.
|
|
|
|
*/
|
|
|
|
static int setup_cs_gpio(struct mxc_spi_slave *mxcs,
|
|
|
|
unsigned int bus, unsigned int cs)
|
2009-02-13 08:26:40 +00:00
|
|
|
{
|
|
|
|
int ret;
|
|
|
|
|
spi: mxc: fix sf probe when using mxc_spi
MXC SPI driver has a feature whereas a GPIO line can be used to force CS high
across multiple transactions. This is set up by embedding the GPIO information
in the CS value:
cs = (cs | gpio << 8)
This merge of cs and gpio data into one value breaks the sf probe command:
if the use of gpio is required, invoking "sf probe <cs>" will not work, because
the CS argument doesn't have the GPIO information in it. Instead, the user must
use "sf probe <cs | gpio << 8>". For example, if bank 2 gpio 30 is used to force
cs high on cs 0, bus 0, then instead of typing "sf probe 0" the user now must
type "sf probe 15872".
This is inconsistent with the description of the sf probe command, and forces
the user to be aware of implementaiton details.
Fix this by introducing a new board function: board_spi_cs_gpio(), which will
accept a naked CS value, and provide the driver with the relevant GPIO, if one
is necessary.
Cc: Eric Nelson <eric.nelson@boundarydevices.com>
Cc: Eric Benard <eric@eukrea.com>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Tim Harvey <tharvey@gateworks.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Tom Rini <trini@ti.com>
Cc: Marek Vasut <marex@denx.de>
Reviewed-by: Marek Vasut <marex@denx.de>
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2014-08-20 12:08:50 +00:00
|
|
|
mxcs->gpio = board_spi_cs_gpio(bus, cs);
|
|
|
|
if (mxcs->gpio == -1)
|
|
|
|
return 0;
|
|
|
|
|
2017-08-09 05:09:33 +00:00
|
|
|
gpio_request(mxcs->gpio, "spi-cs");
|
spi: mxc: fix sf probe when using mxc_spi
MXC SPI driver has a feature whereas a GPIO line can be used to force CS high
across multiple transactions. This is set up by embedding the GPIO information
in the CS value:
cs = (cs | gpio << 8)
This merge of cs and gpio data into one value breaks the sf probe command:
if the use of gpio is required, invoking "sf probe <cs>" will not work, because
the CS argument doesn't have the GPIO information in it. Instead, the user must
use "sf probe <cs | gpio << 8>". For example, if bank 2 gpio 30 is used to force
cs high on cs 0, bus 0, then instead of typing "sf probe 0" the user now must
type "sf probe 15872".
This is inconsistent with the description of the sf probe command, and forces
the user to be aware of implementaiton details.
Fix this by introducing a new board function: board_spi_cs_gpio(), which will
accept a naked CS value, and provide the driver with the relevant GPIO, if one
is necessary.
Cc: Eric Nelson <eric.nelson@boundarydevices.com>
Cc: Eric Benard <eric@eukrea.com>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Tim Harvey <tharvey@gateworks.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Tom Rini <trini@ti.com>
Cc: Marek Vasut <marex@denx.de>
Reviewed-by: Marek Vasut <marex@denx.de>
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2014-08-20 12:08:50 +00:00
|
|
|
ret = gpio_direction_output(mxcs->gpio, !(mxcs->ss_pol));
|
|
|
|
if (ret) {
|
|
|
|
printf("mxc_spi: cannot setup gpio %d\n", mxcs->gpio);
|
|
|
|
return -EINVAL;
|
2009-02-13 08:26:40 +00:00
|
|
|
}
|
|
|
|
|
spi: mxc: fix sf probe when using mxc_spi
MXC SPI driver has a feature whereas a GPIO line can be used to force CS high
across multiple transactions. This is set up by embedding the GPIO information
in the CS value:
cs = (cs | gpio << 8)
This merge of cs and gpio data into one value breaks the sf probe command:
if the use of gpio is required, invoking "sf probe <cs>" will not work, because
the CS argument doesn't have the GPIO information in it. Instead, the user must
use "sf probe <cs | gpio << 8>". For example, if bank 2 gpio 30 is used to force
cs high on cs 0, bus 0, then instead of typing "sf probe 0" the user now must
type "sf probe 15872".
This is inconsistent with the description of the sf probe command, and forces
the user to be aware of implementaiton details.
Fix this by introducing a new board function: board_spi_cs_gpio(), which will
accept a naked CS value, and provide the driver with the relevant GPIO, if one
is necessary.
Cc: Eric Nelson <eric.nelson@boundarydevices.com>
Cc: Eric Benard <eric@eukrea.com>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Tim Harvey <tharvey@gateworks.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Tom Rini <trini@ti.com>
Cc: Marek Vasut <marex@denx.de>
Reviewed-by: Marek Vasut <marex@denx.de>
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2014-08-20 12:08:50 +00:00
|
|
|
return 0;
|
2009-02-13 08:26:40 +00:00
|
|
|
}
|
|
|
|
|
2017-08-09 05:09:33 +00:00
|
|
|
static unsigned long spi_bases[] = {
|
|
|
|
MXC_SPI_BASE_ADDRESSES
|
|
|
|
};
|
|
|
|
|
SPI API improvements
This patch gets rid of the spi_chipsel table and adds a handful of new
functions that makes the SPI layer cleaner and more flexible.
Instead of the spi_chipsel table, each board that wants to use SPI
gets to implement three hooks:
* spi_cs_activate(): Activates the chipselect for a given slave
* spi_cs_deactivate(): Deactivates the chipselect for a given slave
* spi_cs_is_valid(): Determines if the given bus/chipselect
combination can be activated.
Not all drivers may need those extra functions however. If that's the
case, the board code may just leave them out (assuming they know what
the driver needs) or rely on the linker to strip them out (assuming
--gc-sections is being used.)
To set up communication parameters for a given slave, the driver needs
to call spi_setup_slave(). This returns a pointer to an opaque
spi_slave struct which must be passed as a parameter to subsequent SPI
calls. This struct can be freed by calling spi_free_slave(), but most
driver probably don't want to do this.
Before starting one or more SPI transfers, the driver must call
spi_claim_bus() to gain exclusive access to the SPI bus and initialize
the hardware. When all transfers are done, the driver must call
spi_release_bus() to make the bus available to others, and possibly
shut down the SPI controller hardware.
spi_xfer() behaves mostly the same as before, but it now takes a
spi_slave parameter instead of a spi_chipsel function pointer. It also
got a new parameter, flags, which is used to specify chip select
behaviour. This may be extended with other flags in the future.
This patch has been build-tested on all powerpc and arm boards
involved. I have not tested NIOS since I don't have a toolchain for it
installed, so I expect some breakage there even though I've tried
fixing up everything I could find by visual inspection.
I have run-time tested this on AVR32 ATNGW100 using the atmel_spi and
DataFlash drivers posted as a follow-up. I'd like some help testing
other boards that use the existing SPI API.
But most of all, I'd like some comments on the new API. Is this stuff
usable for everyone? If not, why?
Changed in v4:
- Build fixes for various boards, drivers and commands
- Provide common struct spi_slave definition that can be extended by
drivers
- Pass a struct spi_slave * to spi_cs_activate and spi_cs_deactivate
- Make default bus and mode build-time configurable
- Override default SPI bus ID and mode on mx32ads and imx31_litekit.
Changed in v3:
- Add opaque struct spi_slave for controller-specific data associated
with a slave.
- Add spi_claim_bus() and spi_release_bus()
- Add spi_free_slave()
- spi_setup() is now called spi_setup_slave() and returns a
struct spi_slave
- soft_spi now supports four SPI modes (CPOL|CPHA)
- Add bus parameter to spi_setup_slave()
- Convert the new i.MX32 SPI driver
- Convert the new MC13783 RTC driver
Changed in v2:
- Convert the mpc8xxx_spi driver and the mpc8349emds board to the
new API.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Tested-by: Guennadi Liakhovetski <lg@denx.de>
2008-05-16 09:10:31 +00:00
|
|
|
struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
|
|
|
|
unsigned int max_hz, unsigned int mode)
|
2008-04-15 12:14:25 +00:00
|
|
|
{
|
SPI API improvements
This patch gets rid of the spi_chipsel table and adds a handful of new
functions that makes the SPI layer cleaner and more flexible.
Instead of the spi_chipsel table, each board that wants to use SPI
gets to implement three hooks:
* spi_cs_activate(): Activates the chipselect for a given slave
* spi_cs_deactivate(): Deactivates the chipselect for a given slave
* spi_cs_is_valid(): Determines if the given bus/chipselect
combination can be activated.
Not all drivers may need those extra functions however. If that's the
case, the board code may just leave them out (assuming they know what
the driver needs) or rely on the linker to strip them out (assuming
--gc-sections is being used.)
To set up communication parameters for a given slave, the driver needs
to call spi_setup_slave(). This returns a pointer to an opaque
spi_slave struct which must be passed as a parameter to subsequent SPI
calls. This struct can be freed by calling spi_free_slave(), but most
driver probably don't want to do this.
Before starting one or more SPI transfers, the driver must call
spi_claim_bus() to gain exclusive access to the SPI bus and initialize
the hardware. When all transfers are done, the driver must call
spi_release_bus() to make the bus available to others, and possibly
shut down the SPI controller hardware.
spi_xfer() behaves mostly the same as before, but it now takes a
spi_slave parameter instead of a spi_chipsel function pointer. It also
got a new parameter, flags, which is used to specify chip select
behaviour. This may be extended with other flags in the future.
This patch has been build-tested on all powerpc and arm boards
involved. I have not tested NIOS since I don't have a toolchain for it
installed, so I expect some breakage there even though I've tried
fixing up everything I could find by visual inspection.
I have run-time tested this on AVR32 ATNGW100 using the atmel_spi and
DataFlash drivers posted as a follow-up. I'd like some help testing
other boards that use the existing SPI API.
But most of all, I'd like some comments on the new API. Is this stuff
usable for everyone? If not, why?
Changed in v4:
- Build fixes for various boards, drivers and commands
- Provide common struct spi_slave definition that can be extended by
drivers
- Pass a struct spi_slave * to spi_cs_activate and spi_cs_deactivate
- Make default bus and mode build-time configurable
- Override default SPI bus ID and mode on mx32ads and imx31_litekit.
Changed in v3:
- Add opaque struct spi_slave for controller-specific data associated
with a slave.
- Add spi_claim_bus() and spi_release_bus()
- Add spi_free_slave()
- spi_setup() is now called spi_setup_slave() and returns a
struct spi_slave
- soft_spi now supports four SPI modes (CPOL|CPHA)
- Add bus parameter to spi_setup_slave()
- Convert the new i.MX32 SPI driver
- Convert the new MC13783 RTC driver
Changed in v2:
- Convert the mpc8xxx_spi driver and the mpc8349emds board to the
new API.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Tested-by: Guennadi Liakhovetski <lg@denx.de>
2008-05-16 09:10:31 +00:00
|
|
|
struct mxc_spi_slave *mxcs;
|
2009-02-13 08:26:40 +00:00
|
|
|
int ret;
|
|
|
|
|
|
|
|
if (bus >= ARRAY_SIZE(spi_bases))
|
|
|
|
return NULL;
|
|
|
|
|
2014-10-23 14:09:39 +00:00
|
|
|
if (max_hz == 0) {
|
|
|
|
printf("Error: desired clock is 0\n");
|
|
|
|
return NULL;
|
|
|
|
}
|
|
|
|
|
2013-03-18 19:23:40 +00:00
|
|
|
mxcs = spi_alloc_slave(struct mxc_spi_slave, bus, cs);
|
2010-08-20 10:05:03 +00:00
|
|
|
if (!mxcs) {
|
|
|
|
puts("mxc_spi: SPI Slave not allocated !\n");
|
2009-02-13 08:26:40 +00:00
|
|
|
return NULL;
|
2010-08-20 10:05:03 +00:00
|
|
|
}
|
2008-04-15 12:14:25 +00:00
|
|
|
|
2012-11-15 11:23:23 +00:00
|
|
|
mxcs->ss_pol = (mode & SPI_CS_HIGH) ? 1 : 0;
|
|
|
|
|
spi: mxc: fix sf probe when using mxc_spi
MXC SPI driver has a feature whereas a GPIO line can be used to force CS high
across multiple transactions. This is set up by embedding the GPIO information
in the CS value:
cs = (cs | gpio << 8)
This merge of cs and gpio data into one value breaks the sf probe command:
if the use of gpio is required, invoking "sf probe <cs>" will not work, because
the CS argument doesn't have the GPIO information in it. Instead, the user must
use "sf probe <cs | gpio << 8>". For example, if bank 2 gpio 30 is used to force
cs high on cs 0, bus 0, then instead of typing "sf probe 0" the user now must
type "sf probe 15872".
This is inconsistent with the description of the sf probe command, and forces
the user to be aware of implementaiton details.
Fix this by introducing a new board function: board_spi_cs_gpio(), which will
accept a naked CS value, and provide the driver with the relevant GPIO, if one
is necessary.
Cc: Eric Nelson <eric.nelson@boundarydevices.com>
Cc: Eric Benard <eric@eukrea.com>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Tim Harvey <tharvey@gateworks.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Tom Rini <trini@ti.com>
Cc: Marek Vasut <marex@denx.de>
Reviewed-by: Marek Vasut <marex@denx.de>
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2014-08-20 12:08:50 +00:00
|
|
|
ret = setup_cs_gpio(mxcs, bus, cs);
|
2009-02-13 08:26:40 +00:00
|
|
|
if (ret < 0) {
|
|
|
|
free(mxcs);
|
SPI API improvements
This patch gets rid of the spi_chipsel table and adds a handful of new
functions that makes the SPI layer cleaner and more flexible.
Instead of the spi_chipsel table, each board that wants to use SPI
gets to implement three hooks:
* spi_cs_activate(): Activates the chipselect for a given slave
* spi_cs_deactivate(): Deactivates the chipselect for a given slave
* spi_cs_is_valid(): Determines if the given bus/chipselect
combination can be activated.
Not all drivers may need those extra functions however. If that's the
case, the board code may just leave them out (assuming they know what
the driver needs) or rely on the linker to strip them out (assuming
--gc-sections is being used.)
To set up communication parameters for a given slave, the driver needs
to call spi_setup_slave(). This returns a pointer to an opaque
spi_slave struct which must be passed as a parameter to subsequent SPI
calls. This struct can be freed by calling spi_free_slave(), but most
driver probably don't want to do this.
Before starting one or more SPI transfers, the driver must call
spi_claim_bus() to gain exclusive access to the SPI bus and initialize
the hardware. When all transfers are done, the driver must call
spi_release_bus() to make the bus available to others, and possibly
shut down the SPI controller hardware.
spi_xfer() behaves mostly the same as before, but it now takes a
spi_slave parameter instead of a spi_chipsel function pointer. It also
got a new parameter, flags, which is used to specify chip select
behaviour. This may be extended with other flags in the future.
This patch has been build-tested on all powerpc and arm boards
involved. I have not tested NIOS since I don't have a toolchain for it
installed, so I expect some breakage there even though I've tried
fixing up everything I could find by visual inspection.
I have run-time tested this on AVR32 ATNGW100 using the atmel_spi and
DataFlash drivers posted as a follow-up. I'd like some help testing
other boards that use the existing SPI API.
But most of all, I'd like some comments on the new API. Is this stuff
usable for everyone? If not, why?
Changed in v4:
- Build fixes for various boards, drivers and commands
- Provide common struct spi_slave definition that can be extended by
drivers
- Pass a struct spi_slave * to spi_cs_activate and spi_cs_deactivate
- Make default bus and mode build-time configurable
- Override default SPI bus ID and mode on mx32ads and imx31_litekit.
Changed in v3:
- Add opaque struct spi_slave for controller-specific data associated
with a slave.
- Add spi_claim_bus() and spi_release_bus()
- Add spi_free_slave()
- spi_setup() is now called spi_setup_slave() and returns a
struct spi_slave
- soft_spi now supports four SPI modes (CPOL|CPHA)
- Add bus parameter to spi_setup_slave()
- Convert the new i.MX32 SPI driver
- Convert the new MC13783 RTC driver
Changed in v2:
- Convert the mpc8xxx_spi driver and the mpc8349emds board to the
new API.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Tested-by: Guennadi Liakhovetski <lg@denx.de>
2008-05-16 09:10:31 +00:00
|
|
|
return NULL;
|
2009-02-13 08:26:40 +00:00
|
|
|
}
|
|
|
|
|
2010-04-04 20:43:38 +00:00
|
|
|
mxcs->base = spi_bases[bus];
|
2014-10-23 14:09:39 +00:00
|
|
|
mxcs->max_hz = max_hz;
|
|
|
|
mxcs->mode = mode;
|
2010-04-04 20:43:38 +00:00
|
|
|
|
SPI API improvements
This patch gets rid of the spi_chipsel table and adds a handful of new
functions that makes the SPI layer cleaner and more flexible.
Instead of the spi_chipsel table, each board that wants to use SPI
gets to implement three hooks:
* spi_cs_activate(): Activates the chipselect for a given slave
* spi_cs_deactivate(): Deactivates the chipselect for a given slave
* spi_cs_is_valid(): Determines if the given bus/chipselect
combination can be activated.
Not all drivers may need those extra functions however. If that's the
case, the board code may just leave them out (assuming they know what
the driver needs) or rely on the linker to strip them out (assuming
--gc-sections is being used.)
To set up communication parameters for a given slave, the driver needs
to call spi_setup_slave(). This returns a pointer to an opaque
spi_slave struct which must be passed as a parameter to subsequent SPI
calls. This struct can be freed by calling spi_free_slave(), but most
driver probably don't want to do this.
Before starting one or more SPI transfers, the driver must call
spi_claim_bus() to gain exclusive access to the SPI bus and initialize
the hardware. When all transfers are done, the driver must call
spi_release_bus() to make the bus available to others, and possibly
shut down the SPI controller hardware.
spi_xfer() behaves mostly the same as before, but it now takes a
spi_slave parameter instead of a spi_chipsel function pointer. It also
got a new parameter, flags, which is used to specify chip select
behaviour. This may be extended with other flags in the future.
This patch has been build-tested on all powerpc and arm boards
involved. I have not tested NIOS since I don't have a toolchain for it
installed, so I expect some breakage there even though I've tried
fixing up everything I could find by visual inspection.
I have run-time tested this on AVR32 ATNGW100 using the atmel_spi and
DataFlash drivers posted as a follow-up. I'd like some help testing
other boards that use the existing SPI API.
But most of all, I'd like some comments on the new API. Is this stuff
usable for everyone? If not, why?
Changed in v4:
- Build fixes for various boards, drivers and commands
- Provide common struct spi_slave definition that can be extended by
drivers
- Pass a struct spi_slave * to spi_cs_activate and spi_cs_deactivate
- Make default bus and mode build-time configurable
- Override default SPI bus ID and mode on mx32ads and imx31_litekit.
Changed in v3:
- Add opaque struct spi_slave for controller-specific data associated
with a slave.
- Add spi_claim_bus() and spi_release_bus()
- Add spi_free_slave()
- spi_setup() is now called spi_setup_slave() and returns a
struct spi_slave
- soft_spi now supports four SPI modes (CPOL|CPHA)
- Add bus parameter to spi_setup_slave()
- Convert the new i.MX32 SPI driver
- Convert the new MC13783 RTC driver
Changed in v2:
- Convert the mpc8xxx_spi driver and the mpc8349emds board to the
new API.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Tested-by: Guennadi Liakhovetski <lg@denx.de>
2008-05-16 09:10:31 +00:00
|
|
|
return &mxcs->slave;
|
|
|
|
}
|
|
|
|
|
|
|
|
void spi_free_slave(struct spi_slave *slave)
|
|
|
|
{
|
2009-02-06 23:09:12 +00:00
|
|
|
struct mxc_spi_slave *mxcs = to_mxc_spi_slave(slave);
|
|
|
|
|
|
|
|
free(mxcs);
|
SPI API improvements
This patch gets rid of the spi_chipsel table and adds a handful of new
functions that makes the SPI layer cleaner and more flexible.
Instead of the spi_chipsel table, each board that wants to use SPI
gets to implement three hooks:
* spi_cs_activate(): Activates the chipselect for a given slave
* spi_cs_deactivate(): Deactivates the chipselect for a given slave
* spi_cs_is_valid(): Determines if the given bus/chipselect
combination can be activated.
Not all drivers may need those extra functions however. If that's the
case, the board code may just leave them out (assuming they know what
the driver needs) or rely on the linker to strip them out (assuming
--gc-sections is being used.)
To set up communication parameters for a given slave, the driver needs
to call spi_setup_slave(). This returns a pointer to an opaque
spi_slave struct which must be passed as a parameter to subsequent SPI
calls. This struct can be freed by calling spi_free_slave(), but most
driver probably don't want to do this.
Before starting one or more SPI transfers, the driver must call
spi_claim_bus() to gain exclusive access to the SPI bus and initialize
the hardware. When all transfers are done, the driver must call
spi_release_bus() to make the bus available to others, and possibly
shut down the SPI controller hardware.
spi_xfer() behaves mostly the same as before, but it now takes a
spi_slave parameter instead of a spi_chipsel function pointer. It also
got a new parameter, flags, which is used to specify chip select
behaviour. This may be extended with other flags in the future.
This patch has been build-tested on all powerpc and arm boards
involved. I have not tested NIOS since I don't have a toolchain for it
installed, so I expect some breakage there even though I've tried
fixing up everything I could find by visual inspection.
I have run-time tested this on AVR32 ATNGW100 using the atmel_spi and
DataFlash drivers posted as a follow-up. I'd like some help testing
other boards that use the existing SPI API.
But most of all, I'd like some comments on the new API. Is this stuff
usable for everyone? If not, why?
Changed in v4:
- Build fixes for various boards, drivers and commands
- Provide common struct spi_slave definition that can be extended by
drivers
- Pass a struct spi_slave * to spi_cs_activate and spi_cs_deactivate
- Make default bus and mode build-time configurable
- Override default SPI bus ID and mode on mx32ads and imx31_litekit.
Changed in v3:
- Add opaque struct spi_slave for controller-specific data associated
with a slave.
- Add spi_claim_bus() and spi_release_bus()
- Add spi_free_slave()
- spi_setup() is now called spi_setup_slave() and returns a
struct spi_slave
- soft_spi now supports four SPI modes (CPOL|CPHA)
- Add bus parameter to spi_setup_slave()
- Convert the new i.MX32 SPI driver
- Convert the new MC13783 RTC driver
Changed in v2:
- Convert the mpc8xxx_spi driver and the mpc8349emds board to the
new API.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Tested-by: Guennadi Liakhovetski <lg@denx.de>
2008-05-16 09:10:31 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
int spi_claim_bus(struct spi_slave *slave)
|
|
|
|
{
|
|
|
|
struct mxc_spi_slave *mxcs = to_mxc_spi_slave(slave);
|
|
|
|
|
2017-08-09 05:09:33 +00:00
|
|
|
return mxc_spi_claim_bus_internal(mxcs, slave->cs);
|
|
|
|
}
|
|
|
|
|
|
|
|
void spi_release_bus(struct spi_slave *slave)
|
|
|
|
{
|
|
|
|
/* TODO: Shut the controller down */
|
|
|
|
}
|
|
|
|
#else
|
|
|
|
|
|
|
|
static int mxc_spi_probe(struct udevice *bus)
|
|
|
|
{
|
2020-12-03 23:55:20 +00:00
|
|
|
struct mxc_spi_slave *mxcs = dev_get_plat(bus);
|
2017-08-09 05:09:33 +00:00
|
|
|
int node = dev_of_offset(bus);
|
|
|
|
const void *blob = gd->fdt_blob;
|
|
|
|
int ret;
|
2019-05-26 10:15:47 +00:00
|
|
|
int i;
|
2017-08-09 05:09:33 +00:00
|
|
|
|
2019-05-26 10:15:47 +00:00
|
|
|
ret = gpio_request_list_by_name(bus, "cs-gpios", mxcs->cs_gpios,
|
|
|
|
ARRAY_SIZE(mxcs->cs_gpios), 0);
|
|
|
|
if (ret < 0) {
|
|
|
|
pr_err("Can't get %s gpios! Error: %d", bus->name, ret);
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
for (i = 0; i < ARRAY_SIZE(mxcs->cs_gpios); i++) {
|
|
|
|
if (!dm_gpio_is_valid(&mxcs->cs_gpios[i]))
|
|
|
|
continue;
|
|
|
|
|
|
|
|
ret = dm_gpio_set_dir_flags(&mxcs->cs_gpios[i],
|
|
|
|
GPIOD_IS_OUT | GPIOD_ACTIVE_LOW);
|
|
|
|
if (ret) {
|
|
|
|
dev_err(bus, "Setting cs %d error\n", i);
|
|
|
|
return ret;
|
|
|
|
}
|
2017-08-09 05:09:33 +00:00
|
|
|
}
|
|
|
|
|
2020-07-17 05:36:48 +00:00
|
|
|
mxcs->base = dev_read_addr(bus);
|
2019-05-26 10:15:46 +00:00
|
|
|
if (mxcs->base == FDT_ADDR_T_NONE)
|
2017-08-09 05:09:33 +00:00
|
|
|
return -ENODEV;
|
|
|
|
|
2021-01-18 23:58:33 +00:00
|
|
|
#if CONFIG_IS_ENABLED(CLK)
|
|
|
|
struct clk clk;
|
|
|
|
ret = clk_get_by_index(bus, 0, &clk);
|
|
|
|
if (ret)
|
|
|
|
return ret;
|
|
|
|
|
|
|
|
clk_enable(&clk);
|
|
|
|
|
|
|
|
mxcs->max_hz = clk_get_rate(&clk);
|
|
|
|
#else
|
2017-08-09 05:09:33 +00:00
|
|
|
mxcs->max_hz = fdtdec_get_int(blob, node, "spi-max-frequency",
|
|
|
|
20000000);
|
2021-01-18 23:58:33 +00:00
|
|
|
#endif
|
2008-04-15 12:14:25 +00:00
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
SPI API improvements
This patch gets rid of the spi_chipsel table and adds a handful of new
functions that makes the SPI layer cleaner and more flexible.
Instead of the spi_chipsel table, each board that wants to use SPI
gets to implement three hooks:
* spi_cs_activate(): Activates the chipselect for a given slave
* spi_cs_deactivate(): Deactivates the chipselect for a given slave
* spi_cs_is_valid(): Determines if the given bus/chipselect
combination can be activated.
Not all drivers may need those extra functions however. If that's the
case, the board code may just leave them out (assuming they know what
the driver needs) or rely on the linker to strip them out (assuming
--gc-sections is being used.)
To set up communication parameters for a given slave, the driver needs
to call spi_setup_slave(). This returns a pointer to an opaque
spi_slave struct which must be passed as a parameter to subsequent SPI
calls. This struct can be freed by calling spi_free_slave(), but most
driver probably don't want to do this.
Before starting one or more SPI transfers, the driver must call
spi_claim_bus() to gain exclusive access to the SPI bus and initialize
the hardware. When all transfers are done, the driver must call
spi_release_bus() to make the bus available to others, and possibly
shut down the SPI controller hardware.
spi_xfer() behaves mostly the same as before, but it now takes a
spi_slave parameter instead of a spi_chipsel function pointer. It also
got a new parameter, flags, which is used to specify chip select
behaviour. This may be extended with other flags in the future.
This patch has been build-tested on all powerpc and arm boards
involved. I have not tested NIOS since I don't have a toolchain for it
installed, so I expect some breakage there even though I've tried
fixing up everything I could find by visual inspection.
I have run-time tested this on AVR32 ATNGW100 using the atmel_spi and
DataFlash drivers posted as a follow-up. I'd like some help testing
other boards that use the existing SPI API.
But most of all, I'd like some comments on the new API. Is this stuff
usable for everyone? If not, why?
Changed in v4:
- Build fixes for various boards, drivers and commands
- Provide common struct spi_slave definition that can be extended by
drivers
- Pass a struct spi_slave * to spi_cs_activate and spi_cs_deactivate
- Make default bus and mode build-time configurable
- Override default SPI bus ID and mode on mx32ads and imx31_litekit.
Changed in v3:
- Add opaque struct spi_slave for controller-specific data associated
with a slave.
- Add spi_claim_bus() and spi_release_bus()
- Add spi_free_slave()
- spi_setup() is now called spi_setup_slave() and returns a
struct spi_slave
- soft_spi now supports four SPI modes (CPOL|CPHA)
- Add bus parameter to spi_setup_slave()
- Convert the new i.MX32 SPI driver
- Convert the new MC13783 RTC driver
Changed in v2:
- Convert the mpc8xxx_spi driver and the mpc8349emds board to the
new API.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Tested-by: Guennadi Liakhovetski <lg@denx.de>
2008-05-16 09:10:31 +00:00
|
|
|
|
2017-08-09 05:09:33 +00:00
|
|
|
static int mxc_spi_xfer(struct udevice *dev, unsigned int bitlen,
|
|
|
|
const void *dout, void *din, unsigned long flags)
|
SPI API improvements
This patch gets rid of the spi_chipsel table and adds a handful of new
functions that makes the SPI layer cleaner and more flexible.
Instead of the spi_chipsel table, each board that wants to use SPI
gets to implement three hooks:
* spi_cs_activate(): Activates the chipselect for a given slave
* spi_cs_deactivate(): Deactivates the chipselect for a given slave
* spi_cs_is_valid(): Determines if the given bus/chipselect
combination can be activated.
Not all drivers may need those extra functions however. If that's the
case, the board code may just leave them out (assuming they know what
the driver needs) or rely on the linker to strip them out (assuming
--gc-sections is being used.)
To set up communication parameters for a given slave, the driver needs
to call spi_setup_slave(). This returns a pointer to an opaque
spi_slave struct which must be passed as a parameter to subsequent SPI
calls. This struct can be freed by calling spi_free_slave(), but most
driver probably don't want to do this.
Before starting one or more SPI transfers, the driver must call
spi_claim_bus() to gain exclusive access to the SPI bus and initialize
the hardware. When all transfers are done, the driver must call
spi_release_bus() to make the bus available to others, and possibly
shut down the SPI controller hardware.
spi_xfer() behaves mostly the same as before, but it now takes a
spi_slave parameter instead of a spi_chipsel function pointer. It also
got a new parameter, flags, which is used to specify chip select
behaviour. This may be extended with other flags in the future.
This patch has been build-tested on all powerpc and arm boards
involved. I have not tested NIOS since I don't have a toolchain for it
installed, so I expect some breakage there even though I've tried
fixing up everything I could find by visual inspection.
I have run-time tested this on AVR32 ATNGW100 using the atmel_spi and
DataFlash drivers posted as a follow-up. I'd like some help testing
other boards that use the existing SPI API.
But most of all, I'd like some comments on the new API. Is this stuff
usable for everyone? If not, why?
Changed in v4:
- Build fixes for various boards, drivers and commands
- Provide common struct spi_slave definition that can be extended by
drivers
- Pass a struct spi_slave * to spi_cs_activate and spi_cs_deactivate
- Make default bus and mode build-time configurable
- Override default SPI bus ID and mode on mx32ads and imx31_litekit.
Changed in v3:
- Add opaque struct spi_slave for controller-specific data associated
with a slave.
- Add spi_claim_bus() and spi_release_bus()
- Add spi_free_slave()
- spi_setup() is now called spi_setup_slave() and returns a
struct spi_slave
- soft_spi now supports four SPI modes (CPOL|CPHA)
- Add bus parameter to spi_setup_slave()
- Convert the new i.MX32 SPI driver
- Convert the new MC13783 RTC driver
Changed in v2:
- Convert the mpc8xxx_spi driver and the mpc8349emds board to the
new API.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Tested-by: Guennadi Liakhovetski <lg@denx.de>
2008-05-16 09:10:31 +00:00
|
|
|
{
|
2020-12-03 23:55:20 +00:00
|
|
|
struct mxc_spi_slave *mxcs = dev_get_plat(dev->parent);
|
2017-08-09 05:09:33 +00:00
|
|
|
|
|
|
|
|
|
|
|
return mxc_spi_xfer_internal(mxcs, bitlen, dout, din, flags);
|
|
|
|
}
|
|
|
|
|
|
|
|
static int mxc_spi_claim_bus(struct udevice *dev)
|
|
|
|
{
|
2020-12-03 23:55:20 +00:00
|
|
|
struct mxc_spi_slave *mxcs = dev_get_plat(dev->parent);
|
2020-12-03 23:55:23 +00:00
|
|
|
struct dm_spi_slave_plat *slave_plat = dev_get_parent_plat(dev);
|
2017-08-09 05:09:33 +00:00
|
|
|
|
2019-05-26 10:15:47 +00:00
|
|
|
mxcs->dev = dev;
|
|
|
|
|
2017-08-09 05:09:33 +00:00
|
|
|
return mxc_spi_claim_bus_internal(mxcs, slave_plat->cs);
|
SPI API improvements
This patch gets rid of the spi_chipsel table and adds a handful of new
functions that makes the SPI layer cleaner and more flexible.
Instead of the spi_chipsel table, each board that wants to use SPI
gets to implement three hooks:
* spi_cs_activate(): Activates the chipselect for a given slave
* spi_cs_deactivate(): Deactivates the chipselect for a given slave
* spi_cs_is_valid(): Determines if the given bus/chipselect
combination can be activated.
Not all drivers may need those extra functions however. If that's the
case, the board code may just leave them out (assuming they know what
the driver needs) or rely on the linker to strip them out (assuming
--gc-sections is being used.)
To set up communication parameters for a given slave, the driver needs
to call spi_setup_slave(). This returns a pointer to an opaque
spi_slave struct which must be passed as a parameter to subsequent SPI
calls. This struct can be freed by calling spi_free_slave(), but most
driver probably don't want to do this.
Before starting one or more SPI transfers, the driver must call
spi_claim_bus() to gain exclusive access to the SPI bus and initialize
the hardware. When all transfers are done, the driver must call
spi_release_bus() to make the bus available to others, and possibly
shut down the SPI controller hardware.
spi_xfer() behaves mostly the same as before, but it now takes a
spi_slave parameter instead of a spi_chipsel function pointer. It also
got a new parameter, flags, which is used to specify chip select
behaviour. This may be extended with other flags in the future.
This patch has been build-tested on all powerpc and arm boards
involved. I have not tested NIOS since I don't have a toolchain for it
installed, so I expect some breakage there even though I've tried
fixing up everything I could find by visual inspection.
I have run-time tested this on AVR32 ATNGW100 using the atmel_spi and
DataFlash drivers posted as a follow-up. I'd like some help testing
other boards that use the existing SPI API.
But most of all, I'd like some comments on the new API. Is this stuff
usable for everyone? If not, why?
Changed in v4:
- Build fixes for various boards, drivers and commands
- Provide common struct spi_slave definition that can be extended by
drivers
- Pass a struct spi_slave * to spi_cs_activate and spi_cs_deactivate
- Make default bus and mode build-time configurable
- Override default SPI bus ID and mode on mx32ads and imx31_litekit.
Changed in v3:
- Add opaque struct spi_slave for controller-specific data associated
with a slave.
- Add spi_claim_bus() and spi_release_bus()
- Add spi_free_slave()
- spi_setup() is now called spi_setup_slave() and returns a
struct spi_slave
- soft_spi now supports four SPI modes (CPOL|CPHA)
- Add bus parameter to spi_setup_slave()
- Convert the new i.MX32 SPI driver
- Convert the new MC13783 RTC driver
Changed in v2:
- Convert the mpc8xxx_spi driver and the mpc8349emds board to the
new API.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Tested-by: Guennadi Liakhovetski <lg@denx.de>
2008-05-16 09:10:31 +00:00
|
|
|
}
|
2017-08-09 05:09:33 +00:00
|
|
|
|
|
|
|
static int mxc_spi_release_bus(struct udevice *dev)
|
|
|
|
{
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int mxc_spi_set_speed(struct udevice *bus, uint speed)
|
|
|
|
{
|
|
|
|
/* Nothing to do */
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int mxc_spi_set_mode(struct udevice *bus, uint mode)
|
|
|
|
{
|
2020-12-03 23:55:20 +00:00
|
|
|
struct mxc_spi_slave *mxcs = dev_get_plat(bus);
|
2017-08-09 05:09:33 +00:00
|
|
|
|
|
|
|
mxcs->mode = mode;
|
|
|
|
mxcs->ss_pol = (mode & SPI_CS_HIGH) ? 1 : 0;
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static const struct dm_spi_ops mxc_spi_ops = {
|
|
|
|
.claim_bus = mxc_spi_claim_bus,
|
|
|
|
.release_bus = mxc_spi_release_bus,
|
|
|
|
.xfer = mxc_spi_xfer,
|
|
|
|
.set_speed = mxc_spi_set_speed,
|
|
|
|
.set_mode = mxc_spi_set_mode,
|
|
|
|
};
|
|
|
|
|
|
|
|
static const struct udevice_id mxc_spi_ids[] = {
|
|
|
|
{ .compatible = "fsl,imx51-ecspi" },
|
|
|
|
{ }
|
|
|
|
};
|
|
|
|
|
|
|
|
U_BOOT_DRIVER(mxc_spi) = {
|
|
|
|
.name = "mxc_spi",
|
|
|
|
.id = UCLASS_SPI,
|
|
|
|
.of_match = mxc_spi_ids,
|
|
|
|
.ops = &mxc_spi_ops,
|
2020-12-03 23:55:18 +00:00
|
|
|
.plat_auto = sizeof(struct mxc_spi_slave),
|
2017-08-09 05:09:33 +00:00
|
|
|
.probe = mxc_spi_probe,
|
|
|
|
};
|
|
|
|
#endif
|