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spi: spi-mxc: implement clk control for ECSPI to fix SPI_MODE_3
SPI_MODE_3 requires clk high when inactive. The SCLK_CTL field of the config reg was not configured in case of CPOL. Fix configuration so that SPI_MODE_3 which uses CPOL configures the clk line to be high in inactive state. Signed-off-by: Markus Niebel <Markus.Niebel@tqs.de> Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
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5d584ccec1
1 changed files with 7 additions and 2 deletions
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@ -115,7 +115,8 @@ static s32 spi_cfg_mxc(struct mxc_spi_slave *mxcs, unsigned int cs,
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{
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u32 clk_src = mxc_get_clock(MXC_CSPI_CLK);
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s32 reg_ctrl, reg_config;
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u32 ss_pol = 0, sclkpol = 0, sclkpha = 0, pre_div = 0, post_div = 0;
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u32 ss_pol = 0, sclkpol = 0, sclkpha = 0, sclkctl = 0;
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u32 pre_div = 0, post_div = 0;
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struct cspi_regs *regs = (struct cspi_regs *)mxcs->base;
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if (max_hz == 0) {
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@ -164,8 +165,10 @@ static s32 spi_cfg_mxc(struct mxc_spi_slave *mxcs, unsigned int cs,
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if (mode & SPI_CS_HIGH)
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ss_pol = 1;
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if (mode & SPI_CPOL)
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if (mode & SPI_CPOL) {
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sclkpol = 1;
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sclkctl = 1;
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}
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if (mode & SPI_CPHA)
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sclkpha = 1;
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@ -180,6 +183,8 @@ static s32 spi_cfg_mxc(struct mxc_spi_slave *mxcs, unsigned int cs,
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(ss_pol << (cs + MXC_CSPICON_SSPOL));
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reg_config = (reg_config & ~(1 << (cs + MXC_CSPICON_POL))) |
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(sclkpol << (cs + MXC_CSPICON_POL));
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reg_config = (reg_config & ~(1 << (cs + MXC_CSPICON_CTL))) |
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(sclkctl << (cs + MXC_CSPICON_CTL));
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reg_config = (reg_config & ~(1 << (cs + MXC_CSPICON_PHA))) |
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(sclkpha << (cs + MXC_CSPICON_PHA));
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