u-boot/arch/arm/dts/ulcb.dtsi

// SPDX-License-Identifier: GPL-2.0
/*
 * Device Tree Source for the R-Car Gen3 ULCB board
 *
 * Copyright (C) 2016 Renesas Electronics Corp.
 * Copyright (C) 2016 Cogent Embedded, Inc.
 */

#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>

/ {
	model = "Renesas R-Car Gen3 ULCB board";

	aliases {
		i2c0 = &i2c0;
		i2c1 = &i2c1;
		i2c2 = &i2c2;
		i2c3 = &i2c3;
		i2c4 = &i2c4;
		i2c5 = &i2c5;
		i2c6 = &i2c6;
		i2c7 = &i2c_dvfs;
		serial0 = &scif2;
		ethernet0 = &avb;
		mmc0 = &sdhi2;
		mmc1 = &sdhi0;
	};

	chosen {
		bootargs = "ignore_loglevel rw root=/dev/nfs ip=on";
		stdout-path = "serial0:115200n8";
	};

	audio_clkout: audio-clkout {
		/*
		 * This is same as <&rcar_sound 0>
		 * but needed to avoid cs2000/rcar_sound probe dead-lock
		 */
		compatible = "fixed-clock";
		#clock-cells = <0>;
		clock-frequency = <12288000>;
	};

	hdmi0-out {
		compatible = "hdmi-connector";
		type = "a";

		port {
			hdmi0_con: endpoint {
				remote-endpoint = <&rcar_dw_hdmi0_out>;
			};
		};
	};

	keyboard {
		compatible = "gpio-keys";

		key-1 {
			linux,code = <KEY_1>;
			label = "SW3";
			wakeup-source;
			debounce-interval = <20>;
			gpios = <&gpio6 11 GPIO_ACTIVE_LOW>;
		};
	};

	leds {
		compatible = "gpio-leds";

		led5 {
			gpios = <&gpio6 12 GPIO_ACTIVE_HIGH>;
		};
		led6 {
			gpios = <&gpio6 13 GPIO_ACTIVE_HIGH>;
		};
	};

	reg_1p8v: regulator-1p8v {
		compatible = "regulator-fixed";
		regulator-name = "fixed-1.8V";
		regulator-min-microvolt = <1800000>;
		regulator-max-microvolt = <1800000>;
		regulator-boot-on;
		regulator-always-on;
	};

	reg_3p3v: regulator-3p3v {
		compatible = "regulator-fixed";
		regulator-name = "fixed-3.3V";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		regulator-boot-on;
		regulator-always-on;
	};

	vcc_sdhi0: regulator-vcc-sdhi0 {
		compatible = "regulator-fixed";

		regulator-name = "SDHI0 Vcc";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;

		gpio = <&gpio5 2 GPIO_ACTIVE_HIGH>;
		enable-active-high;
	};

	vccq_sdhi0: regulator-vccq-sdhi0 {
		compatible = "regulator-gpio";

		regulator-name = "SDHI0 VccQ";
		regulator-min-microvolt = <1800000>;
		regulator-max-microvolt = <3300000>;

		gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>;
		gpios-states = <1>;
		states = <3300000 1>, <1800000 0>;
	};

	x12_clk: x12 {
		compatible = "fixed-clock";
		#clock-cells = <0>;
		clock-frequency = <24576000>;
	};

	x23_clk: x23-clock {
		compatible = "fixed-clock";
		#clock-cells = <0>;
		clock-frequency = <25000000>;
	};
};

&a57_0 {
	cpu-supply = <&dvfs>;
};

&audio_clk_a {
	clock-frequency = <22579200>;
};

&avb {
	pinctrl-0 = <&avb_pins>;
	pinctrl-names = "default";
	phy-handle = <&phy0>;
	tx-internal-delay-ps = <2000>;
	status = "okay";

	phy0: ethernet-phy@0 {
		compatible = "ethernet-phy-id0022.1622",
			     "ethernet-phy-ieee802.3-c22";
		rxc-skew-ps = <1500>;
		reg = <0>;
		interrupt-parent = <&gpio2>;
		interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
		reset-gpios = <&gpio2 10 GPIO_ACTIVE_LOW>;
	};
};

&du {
	status = "okay";
};

&ehci1 {
	status = "okay";
};

&extal_clk {
	clock-frequency = <16666666>;
};

&extalr_clk {
	clock-frequency = <32768>;
};

&hdmi0 {
	status = "okay";

	ports {
		port@1 {
			reg = <1>;
			rcar_dw_hdmi0_out: endpoint {
				remote-endpoint = <&hdmi0_con>;
			};
		};
		port@2 {
			reg = <2>;
		};
	};
};

&i2c2 {
	pinctrl-0 = <&i2c2_pins>;
	pinctrl-names = "default";

	status = "okay";

	clock-frequency = <100000>;

	ak4613: codec@10 {
		compatible = "asahi-kasei,ak4613";
		reg = <0x10>;
		clocks = <&rcar_sound 3>;

		asahi-kasei,in1-single-end;
		asahi-kasei,in2-single-end;
		asahi-kasei,out1-single-end;
		asahi-kasei,out2-single-end;
		asahi-kasei,out3-single-end;
		asahi-kasei,out4-single-end;
		asahi-kasei,out5-single-end;
		asahi-kasei,out6-single-end;
	};

	cs2000: clk-multiplier@4f {
		#clock-cells = <0>;
		compatible = "cirrus,cs2000-cp";
		reg = <0x4f>;
		clocks = <&audio_clkout>, <&x12_clk>;
		clock-names = "clk_in", "ref_clk";

		assigned-clocks = <&cs2000>;
		assigned-clock-rates = <24576000>; /* 1/1 divide */
	};
};

&i2c4 {
	status = "okay";

	clock-frequency = <400000>;

	versaclock5: clock-generator@6a {
		compatible = "idt,5p49v5925";
		reg = <0x6a>;
		#clock-cells = <1>;
		clocks = <&x23_clk>;
		clock-names = "xin";
	};
};

&i2c_dvfs {
	status = "okay";

	clock-frequency = <400000>;

	pmic: pmic@30 {
		pinctrl-0 = <&irq0_pins>;
		pinctrl-names = "default";

		compatible = "rohm,bd9571mwv";
		reg = <0x30>;
		interrupt-parent = <&intc_ex>;
		interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
		interrupt-controller;
		#interrupt-cells = <2>;
		gpio-controller;
		#gpio-cells = <2>;
		rohm,ddr-backup-power = <0xf>;
		rohm,rstbmode-pulse;

		regulators {
			dvfs: dvfs {
				regulator-name = "dvfs";
				regulator-min-microvolt = <750000>;
				regulator-max-microvolt = <1030000>;
				regulator-boot-on;
				regulator-always-on;
			};
		};
	};

	eeprom@50 {
		compatible = "rohm,br24t01", "atmel,24c01";
		reg = <0x50>;
		pagesize = <8>;
	};
};

&ohci1 {
	status = "okay";
};

&pfc {
	pinctrl-0 = <&scif_clk_pins>;
	pinctrl-names = "default";

	avb_pins: avb {
		mux {
			groups = "avb_link", "avb_mdio", "avb_mii";
			function = "avb";
		};

		pins_mdio {
			groups = "avb_mdio";
			drive-strength = <24>;
		};

		pins_mii_tx {
			pins = "PIN_AVB_TX_CTL", "PIN_AVB_TXC", "PIN_AVB_TD0",
			       "PIN_AVB_TD1", "PIN_AVB_TD2", "PIN_AVB_TD3";
			drive-strength = <12>;
		};
	};

	i2c2_pins: i2c2 {
		groups = "i2c2_a";
		function = "i2c2";
	};

	irq0_pins: irq0 {
		groups = "intc_ex_irq0";
		function = "intc_ex";
	};

	scif2_pins: scif2 {
		groups = "scif2_data_a";
		function = "scif2";
	};

	scif_clk_pins: scif_clk {
		groups = "scif_clk_a";
		function = "scif_clk";
	};

	sdhi0_pins: sd0 {
		groups = "sdhi0_data4", "sdhi0_ctrl";
		function = "sdhi0";
		power-source = <3300>;
	};

	sdhi0_pins_uhs: sd0_uhs {
		groups = "sdhi0_data4", "sdhi0_ctrl";
		function = "sdhi0";
		power-source = <1800>;
	};

	sdhi2_pins: sd2 {
		groups = "sdhi2_data8", "sdhi2_ctrl", "sdhi2_ds";
		function = "sdhi2";
		power-source = <1800>;
	};

	sound_pins: sound {
		groups = "ssi01239_ctrl", "ssi0_data", "ssi1_data_a";
		function = "ssi";
	};

	sound_clk_pins: sound-clk {
		groups = "audio_clk_a_a", "audio_clk_b_a", "audio_clk_c_a",
			 "audio_clkout_a", "audio_clkout3_a";
		function = "audio_clk";
	};

	usb1_pins: usb1 {
		groups = "usb1";
		function = "usb1";
	};
};

&rcar_sound {
	pinctrl-0 = <&sound_pins>, <&sound_clk_pins>;
	pinctrl-names = "default";

	/* audio_clkout0/1/2/3 */
	#clock-cells = <1>;
	clock-frequency = <12288000 11289600>;

	status = "okay";

	/* update <audio_clk_b> to <cs2000> */
	clocks = <&cpg CPG_MOD 1005>,
		 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
		 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
		 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
		 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
		 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
		 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
		 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
		 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
		 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
		 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
		 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
		 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
		 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
		 <&audio_clk_a>, <&cs2000>,
		 <&audio_clk_c>,
		 <&cpg CPG_CORE CPG_AUDIO_CLK_I>;
};

&rpc {
	/* Left disabled.  To be enabled by firmware when unlocked. */

	flash@0 {
		compatible = "cypress,hyperflash", "cfi-flash";
		reg = <0>;

		partitions {
			compatible = "fixed-partitions";
			#address-cells = <1>;
			#size-cells = <1>;

			bootparam@0 {
				reg = <0x00000000 0x040000>;
				read-only;
			};
			bl2@40000 {
				reg = <0x00040000 0x140000>;
				read-only;
			};
			cert_header_sa6@180000 {
				reg = <0x00180000 0x040000>;
				read-only;
			};
			bl31@1c0000 {
				reg = <0x001c0000 0x040000>;
				read-only;
			};
			tee@200000 {
				reg = <0x00200000 0x440000>;
				read-only;
			};
			uboot@640000 {
				reg = <0x00640000 0x100000>;
				read-only;
			};
			dtb@740000 {
				reg = <0x00740000 0x080000>;
			};
			kernel@7c0000 {
				reg = <0x007c0000 0x1400000>;
			};
			user@1bc0000 {
				reg = <0x01bc0000 0x2440000>;
			};
		};
	};
};

&rwdt {
	timeout-sec = <60>;
	status = "okay";
};

&scif2 {
	pinctrl-0 = <&scif2_pins>;
	pinctrl-names = "default";

	status = "okay";
};

&scif_clk {
	clock-frequency = <14745600>;
};

&sdhi0 {
	pinctrl-0 = <&sdhi0_pins>;
	pinctrl-1 = <&sdhi0_pins_uhs>;
	pinctrl-names = "default", "state_uhs";

	vmmc-supply = <&vcc_sdhi0>;
	vqmmc-supply = <&vccq_sdhi0>;
	cd-gpios = <&gpio3 12 GPIO_ACTIVE_LOW>;
	bus-width = <4>;
	sd-uhs-sdr50;
	sd-uhs-sdr104;
	status = "okay";
};

&sdhi2 {
	/* used for on-board 8bit eMMC */
	pinctrl-0 = <&sdhi2_pins>;
	pinctrl-1 = <&sdhi2_pins>;
	pinctrl-names = "default", "state_uhs";

	vmmc-supply = <&reg_3p3v>;
	vqmmc-supply = <&reg_1p8v>;
	bus-width = <8>;
	mmc-hs200-1_8v;
	mmc-hs400-1_8v;
	no-sd;
	no-sdio;
	non-removable;
	full-pwr-cycle-in-suspend;
	status = "okay";
};

&ssi1 {
	shared-pin;
};

&usb2_phy1 {
	pinctrl-0 = <&usb1_pins>;
	pinctrl-names = "default";

	status = "okay";
};


/*
 * For sound-test.
 *
 * We can switch Audio Card for testing
 *
 * #include "ulcb-simple-audio-card.dtsi"
 * #include "ulcb-simple-audio-card-mix+split.dtsi"
 * #include "ulcb-audio-graph-card.dtsi"
 * #include "ulcb-audio-graph-card-mix+split.dtsi"
 * #include "ulcb-audio-graph-card2-mix+split.dtsi"
 */
#include "ulcb-audio-graph-card2.dtsi"