2020-05-06 08:02:41 -04:00
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if ARCH_TEGRA
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2014-08-31 07:10:56 +09:00
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2016-09-12 23:18:39 -06:00
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config SPL_GPIO_SUPPORT
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default y
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2016-09-12 23:18:41 -06:00
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config SPL_LIBCOMMON_SUPPORT
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default y
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2016-09-12 23:18:43 -06:00
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config SPL_LIBGENERIC_SUPPORT
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default y
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2016-09-12 23:18:56 -06:00
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config SPL_SERIAL_SUPPORT
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default y
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2019-04-15 11:32:18 +02:00
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config TEGRA_CLKRST
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bool
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2019-04-15 11:32:19 +02:00
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config TEGRA_GP_PADCTRL
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bool
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2016-07-18 12:17:11 -06:00
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config TEGRA_IVC
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bool "Tegra IVC protocol"
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help
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IVC (Inter-VM Communication) protocol is a Tegra-specific IPC
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(Inter Processor Communication) framework. Within the context of
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U-Boot, it is typically used for communication between the main CPU
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and various auxiliary processors.
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2019-04-15 11:32:20 +02:00
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config TEGRA_MC
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bool
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2019-04-15 11:32:21 +02:00
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config TEGRA_PINCTRL
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bool
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2019-04-15 11:32:22 +02:00
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config TEGRA_PMC
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bool
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2019-04-15 11:32:25 +02:00
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config TEGRA_PMC_SECURE
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bool
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depends on TEGRA_PMC
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2015-11-23 10:32:01 -07:00
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config TEGRA_COMMON
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bool "Tegra common options"
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2018-07-23 15:55:13 +02:00
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select BOARD_EARLY_INIT_F
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2016-09-13 10:46:00 -06:00
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select CLK
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2015-07-17 08:12:51 -07:00
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select DM
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2015-11-29 13:18:01 -07:00
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select DM_ETH
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2015-07-17 08:12:51 -07:00
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select DM_GPIO
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2015-11-23 10:32:01 -07:00
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select DM_I2C
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2015-10-18 21:17:16 -06:00
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select DM_KEYBOARD
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2016-09-13 10:45:48 -06:00
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select DM_MMC
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2016-01-30 16:38:01 -07:00
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select DM_PWM
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2016-09-13 10:46:00 -06:00
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select DM_RESET
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2015-11-23 10:32:01 -07:00
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select DM_SERIAL
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select DM_SPI
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select DM_SPI_FLASH
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2016-09-13 10:46:00 -06:00
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select MISC
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2015-11-23 10:32:01 -07:00
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select OF_CONTROL
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2018-07-23 15:55:13 +02:00
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select SPI
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2018-07-23 15:55:14 +02:00
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imply CMD_DM
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2017-05-19 17:26:58 +01:00
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imply CRC32_VERIFY
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2015-11-23 10:32:01 -07:00
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2016-09-13 10:46:00 -06:00
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config TEGRA_NO_BPMP
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bool "Tegra common options for SoCs without BPMP"
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select TEGRA_CAR
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select TEGRA_CAR_CLOCK
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select TEGRA_CAR_RESET
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2015-11-23 10:32:01 -07:00
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config TEGRA_ARMV7_COMMON
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bool "Tegra 32-bit common options"
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2020-07-19 13:56:00 -06:00
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select BINMAN
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2018-04-26 18:21:26 +05:30
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select CPU_V7A
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2015-11-23 10:32:01 -07:00
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select SPL
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2017-05-03 17:13:32 +08:00
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select SPL_BOARD_INIT if SPL
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2015-11-23 10:32:01 -07:00
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select SUPPORT_SPL
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2019-04-15 11:32:18 +02:00
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select TEGRA_CLKRST
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2015-11-23 10:32:01 -07:00
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select TEGRA_COMMON
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2016-05-12 12:07:41 -06:00
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select TEGRA_GPIO
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2019-04-15 11:32:19 +02:00
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select TEGRA_GP_PADCTRL
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2019-04-15 11:32:20 +02:00
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select TEGRA_MC
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2016-09-13 10:46:00 -06:00
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select TEGRA_NO_BPMP
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2019-04-15 11:32:21 +02:00
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select TEGRA_PINCTRL
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2019-04-15 11:32:22 +02:00
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select TEGRA_PMC
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2015-11-23 10:32:01 -07:00
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config TEGRA_ARMV8_COMMON
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bool "Tegra 64-bit common options"
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select ARM64
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2019-06-26 13:51:46 +09:00
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select INIT_SP_RELATIVE
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2018-01-03 14:31:52 -07:00
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select LINUX_KERNEL_IMAGE_HEADER
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2019-04-15 11:32:32 +02:00
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select POSITION_INDEPENDENT
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2015-11-23 10:32:01 -07:00
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select TEGRA_COMMON
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2015-07-17 08:12:51 -07:00
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2018-01-03 14:31:52 -07:00
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if TEGRA_ARMV8_COMMON
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config LNX_KRNL_IMG_TEXT_OFFSET_BASE
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default 0x80000000
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endif
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2014-08-31 07:10:56 +09:00
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choice
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prompt "Tegra SoC select"
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2015-05-12 14:46:23 -05:00
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optional
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2014-08-31 07:10:56 +09:00
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config TEGRA20
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bool "Tegra20 family"
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2017-03-07 07:13:42 -05:00
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select ARM_ERRATA_716044
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select ARM_ERRATA_742230
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select ARM_ERRATA_751472
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2015-07-17 08:12:51 -07:00
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select TEGRA_ARMV7_COMMON
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2014-08-31 07:10:56 +09:00
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config TEGRA30
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bool "Tegra30 family"
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2017-03-07 07:13:42 -05:00
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select ARM_ERRATA_743622
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select ARM_ERRATA_751472
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2015-07-17 08:12:51 -07:00
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select TEGRA_ARMV7_COMMON
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2014-08-31 07:10:56 +09:00
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config TEGRA114
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bool "Tegra114 family"
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2015-07-17 08:12:51 -07:00
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select TEGRA_ARMV7_COMMON
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2014-08-31 07:10:56 +09:00
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config TEGRA124
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bool "Tegra124 family"
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2015-07-17 08:12:51 -07:00
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select TEGRA_ARMV7_COMMON
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2017-07-25 08:29:58 -06:00
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imply REGMAP
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imply SYSCON
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2014-08-31 07:10:56 +09:00
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2015-03-04 16:36:00 -07:00
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config TEGRA210
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bool "Tegra210 family"
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2015-11-23 10:32:01 -07:00
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select TEGRA_ARMV8_COMMON
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2019-04-15 11:32:18 +02:00
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select TEGRA_CLKRST
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2018-07-23 15:55:13 +02:00
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select TEGRA_GPIO
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2019-04-15 11:32:19 +02:00
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select TEGRA_GP_PADCTRL
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2019-04-15 11:32:20 +02:00
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select TEGRA_MC
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2016-09-13 10:46:00 -06:00
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select TEGRA_NO_BPMP
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2019-04-15 11:32:21 +02:00
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select TEGRA_PINCTRL
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2019-04-15 11:32:22 +02:00
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select TEGRA_PMC
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2019-04-15 11:32:25 +02:00
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select TEGRA_PMC_SECURE
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2015-03-04 16:36:00 -07:00
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2016-05-12 13:32:55 -06:00
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config TEGRA186
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bool "Tegra186 family"
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2016-06-17 09:43:57 -06:00
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select DM_MAILBOX
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2016-08-08 09:41:34 -06:00
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select TEGRA186_BPMP
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2016-08-08 11:28:24 -06:00
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select TEGRA186_CLOCK
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2016-05-12 13:32:55 -06:00
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select TEGRA186_GPIO
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2016-08-08 11:28:25 -06:00
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select TEGRA186_RESET
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2016-05-12 13:32:55 -06:00
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select TEGRA_ARMV8_COMMON
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2016-06-17 09:43:57 -06:00
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select TEGRA_HSP
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2016-07-18 12:17:11 -06:00
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select TEGRA_IVC
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2016-05-12 13:32:55 -06:00
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2014-08-31 07:10:56 +09:00
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endchoice
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2016-01-26 10:59:42 -07:00
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config TEGRA_DISCONNECT_UDC_ON_BOOT
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bool "Disconnect USB device mode controller on boot"
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2019-04-15 11:32:26 +02:00
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depends on CI_UDC
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2016-01-26 10:59:42 -07:00
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default y
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help
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When loading U-Boot into RAM over USB protocols using tools such as
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tegrarcm or L4T's exec-uboot.sh/tegraflash.py, Tegra's USB device
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mode controller is initialized and enumerated by the host PC running
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the tool. Unfortunately, these tools do not shut down the USB
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controller before executing the downloaded code, and so the host PC
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does not "de-enumerate" the USB device. This option shuts down the
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USB controller when U-Boot boots to avoid leaving a stale USB device
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present.
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2015-02-11 16:32:59 -07:00
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config SYS_MALLOC_F_LEN
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default 0x1800
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2015-02-20 17:04:04 +09:00
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source "arch/arm/mach-tegra/tegra20/Kconfig"
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source "arch/arm/mach-tegra/tegra30/Kconfig"
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source "arch/arm/mach-tegra/tegra114/Kconfig"
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source "arch/arm/mach-tegra/tegra124/Kconfig"
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2015-03-04 16:36:00 -07:00
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source "arch/arm/mach-tegra/tegra210/Kconfig"
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2016-05-12 13:32:55 -06:00
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source "arch/arm/mach-tegra/tegra186/Kconfig"
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2014-08-31 07:10:56 +09:00
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2017-05-17 03:25:11 -06:00
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config CMD_ENTERRCM
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bool "Enable 'enterrcm' command"
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default y
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help
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Tegra's boot ROM supports a mode whereby code may be downloaded and
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flash-programmed over a USB connection. On dev boards, this is
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typically entered by holding down a "force recovery" button and
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resetting the CPU. However, not all boards have such a button (one
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example is the Compulab Trimslice), so a method to enter RCM from
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software is useful.
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Even on boards other than Trimslice, controlling this over a UART
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may be useful, e.g. to allow simple remote control without the need
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for mechanical button actuators, or hooking up relays/... to the
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button.
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2014-08-31 07:10:56 +09:00
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endif
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