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reset: add Tegra186 reset driver

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In Tegra186, on-SoC reset signals are manipulated using IPC requests to
the BPMP (Boot and Power Management Processor). This change implements a
driver that does that. It is unconditionally selected by CONFIG_TEGRA186
since virtually any Tegra186 build of U-Boot will need the feature.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
This commit is contained in:
Stephen Warren 2016-08-08 11:28:25 -06:00 committed by Tom Warren
parent d9fd7008f4
commit 4dd99d140c
4 changed files with 91 additions and 0 deletions
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2
arch/arm/mach-tegra/Kconfig
View file

@ -66,10 +66,12 @@ config TEGRA186
bool "Tegra186 family"
select CLK
select DM_MAILBOX
select DM_RESET
select MISC
select TEGRA186_BPMP
select TEGRA186_CLOCK
select TEGRA186_GPIO
select TEGRA186_RESET
select TEGRA_ARMV8_COMMON
select TEGRA_HSP
select TEGRA_IVC

7
drivers/reset/Kconfig
View file

@ -20,4 +20,11 @@ config SANDBOX_RESET
simply accepts requests to reset various HW modules without actually
doing anything beyond a little error checking.
config TEGRA186_RESET
bool "Enable Tegra186 BPMP-based reset driver"
depends on TEGRA186_BPMP
help
Enable support for manipulating Tegra's on-SoC reset signals via IPC
requests to the BPMP (Boot and Power Management Processor).
endmenu

1
drivers/reset/Makefile
View file

@ -5,3 +5,4 @@
obj-$(CONFIG_DM_RESET) += reset-uclass.o
obj-$(CONFIG_SANDBOX_MBOX) += sandbox-reset.o
obj-$(CONFIG_SANDBOX_MBOX) += sandbox-reset-test.o
obj-$(CONFIG_TEGRA186_RESET) += tegra186-reset.o

81
drivers/reset/tegra186-reset.c Normal file
View file

@ -0,0 +1,81 @@
/*
* Copyright (c) 2016, NVIDIA CORPORATION.
*
* SPDX-License-Identifier: GPL-2.0
*/
#include <common.h>
#include <dm.h>
#include <misc.h>
#include <reset-uclass.h>
#include <asm/arch-tegra/bpmp_abi.h>
static int tegra186_reset_request(struct reset_ctl *reset_ctl)
{
debug("%s(reset_ctl=%p) (dev=%p, id=%lu)\n", __func__, reset_ctl,
reset_ctl->dev, reset_ctl->id);
return 0;
}
static int tegra186_reset_free(struct reset_ctl *reset_ctl)
{
debug("%s(reset_ctl=%p) (dev=%p, id=%lu)\n", __func__, reset_ctl,
reset_ctl->dev, reset_ctl->id);
return 0;
}
static int tegra186_reset_common(struct reset_ctl *reset_ctl,
enum mrq_reset_commands cmd)
{
struct mrq_reset_request req;
int ret;
req.cmd = cmd;
req.reset_id = reset_ctl->id;
ret = misc_call(reset_ctl->dev->parent, MRQ_RESET, &req, sizeof(req),
NULL, 0);
if (ret < 0)
return ret;
return 0;
}
static int tegra186_reset_assert(struct reset_ctl *reset_ctl)
{
debug("%s(reset_ctl=%p) (dev=%p, id=%lu)\n", __func__, reset_ctl,
reset_ctl->dev, reset_ctl->id);
return tegra186_reset_common(reset_ctl, CMD_RESET_ASSERT);
}
static int tegra186_reset_deassert(struct reset_ctl *reset_ctl)
{
debug("%s(reset_ctl=%p) (dev=%p, id=%lu)\n", __func__, reset_ctl,
reset_ctl->dev, reset_ctl->id);
return tegra186_reset_common(reset_ctl, CMD_RESET_DEASSERT);
}
struct reset_ops tegra186_reset_ops = {
.request = tegra186_reset_request,
.free = tegra186_reset_free,
.rst_assert = tegra186_reset_assert,
.rst_deassert = tegra186_reset_deassert,
};
static int tegra186_reset_probe(struct udevice *dev)
{
debug("%s(dev=%p)\n", __func__, dev);
return 0;
}
U_BOOT_DRIVER(tegra186_reset) = {
.name = "tegra186_reset",
.id = UCLASS_RESET,
.probe = tegra186_reset_probe,
.ops = &tegra186_reset_ops,
};