sunxi: Add defconfig and dts for Orange Pi 2 SBC
The Orange Pi 2 is a SBC based on the Allwinner H3 SoC with a uSD slot,
4 USB ports connected via a USB-2 hub, a 10/100M ethernet port using the
SoC's integrated PHY, Wifi via a RTL8189ETV sdio wifi chip, USB OTG, HDMI,
a TRRS headphone jack for stereo out and composite out, a microphone,
an IR receiver, a CSI connector, 2 LEDs, a 3 pin UART header
and a 40-pin GPIO header.
The added dts file is identical to the one submitted to the upstream
kernel.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
2016-03-23 08:59:23 +00:00
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/*
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* Copyright (C) 2016 Hans de Goede <hdegoede@redhat.com>
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*
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* This file is dual-licensed: you can use it either under the terms
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* of the GPL or the X11 license, at your option. Note that this dual
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* licensing only applies to this file, and not this project as a
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* whole.
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*
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* a) This file is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of the
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* License, or (at your option) any later version.
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*
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* This file is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* Or, alternatively,
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*
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* b) Permission is hereby granted, free of charge, to any person
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* obtaining a copy of this software and associated documentation
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* files (the "Software"), to deal in the Software without
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* restriction, including without limitation the rights to use,
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* copy, modify, merge, publish, distribute, sublicense, and/or
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* sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following
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* conditions:
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*
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* The above copyright notice and this permission notice shall be
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* included in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
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* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
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* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
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* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*/
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/dts-v1/;
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#include "sun8i-h3.dtsi"
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#include "sunxi-common-regulators.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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/ {
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model = "Xunlong Orange Pi 2";
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compatible = "xunlong,orangepi-2", "allwinner,sun8i-h3";
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aliases {
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serial0 = &uart0;
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2016-08-18 18:51:12 +00:00
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/* ethernet0 is the H3 emac, defined in sun8i-h3.dtsi */
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2018-04-04 00:31:18 +00:00
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ethernet0 = &emac;
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2016-08-18 18:51:12 +00:00
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ethernet1 = &rtl8189;
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sunxi: Add defconfig and dts for Orange Pi 2 SBC
The Orange Pi 2 is a SBC based on the Allwinner H3 SoC with a uSD slot,
4 USB ports connected via a USB-2 hub, a 10/100M ethernet port using the
SoC's integrated PHY, Wifi via a RTL8189ETV sdio wifi chip, USB OTG, HDMI,
a TRRS headphone jack for stereo out and composite out, a microphone,
an IR receiver, a CSI connector, 2 LEDs, a 3 pin UART header
and a 40-pin GPIO header.
The added dts file is identical to the one submitted to the upstream
kernel.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
2016-03-23 08:59:23 +00:00
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};
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chosen {
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stdout-path = "serial0:115200n8";
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};
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2018-07-04 13:16:38 +00:00
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connector {
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compatible = "hdmi-connector";
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type = "a";
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port {
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hdmi_con_in: endpoint {
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remote-endpoint = <&hdmi_out_con>;
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};
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};
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};
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sunxi: Add defconfig and dts for Orange Pi 2 SBC
The Orange Pi 2 is a SBC based on the Allwinner H3 SoC with a uSD slot,
4 USB ports connected via a USB-2 hub, a 10/100M ethernet port using the
SoC's integrated PHY, Wifi via a RTL8189ETV sdio wifi chip, USB OTG, HDMI,
a TRRS headphone jack for stereo out and composite out, a microphone,
an IR receiver, a CSI connector, 2 LEDs, a 3 pin UART header
and a 40-pin GPIO header.
The added dts file is identical to the one submitted to the upstream
kernel.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
2016-03-23 08:59:23 +00:00
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leds {
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compatible = "gpio-leds";
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status_led {
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label = "orangepi:red:status";
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gpios = <&pio 0 15 GPIO_ACTIVE_HIGH>;
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};
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pwr_led {
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label = "orangepi:green:pwr";
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gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>;
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default-state = "on";
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};
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};
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r_gpio_keys {
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compatible = "gpio-keys";
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sw2 {
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label = "sw2";
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linux,code = <BTN_1>;
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gpios = <&r_pio 0 4 GPIO_ACTIVE_LOW>;
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};
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sw4 {
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label = "sw4";
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2022-04-27 20:31:27 +00:00
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linux,code = <KEY_POWER>;
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sunxi: Add defconfig and dts for Orange Pi 2 SBC
The Orange Pi 2 is a SBC based on the Allwinner H3 SoC with a uSD slot,
4 USB ports connected via a USB-2 hub, a 10/100M ethernet port using the
SoC's integrated PHY, Wifi via a RTL8189ETV sdio wifi chip, USB OTG, HDMI,
a TRRS headphone jack for stereo out and composite out, a microphone,
an IR receiver, a CSI connector, 2 LEDs, a 3 pin UART header
and a 40-pin GPIO header.
The added dts file is identical to the one submitted to the upstream
kernel.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
2016-03-23 08:59:23 +00:00
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gpios = <&r_pio 0 3 GPIO_ACTIVE_LOW>;
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2022-04-27 20:31:27 +00:00
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wakeup-source;
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sunxi: Add defconfig and dts for Orange Pi 2 SBC
The Orange Pi 2 is a SBC based on the Allwinner H3 SoC with a uSD slot,
4 USB ports connected via a USB-2 hub, a 10/100M ethernet port using the
SoC's integrated PHY, Wifi via a RTL8189ETV sdio wifi chip, USB OTG, HDMI,
a TRRS headphone jack for stereo out and composite out, a microphone,
an IR receiver, a CSI connector, 2 LEDs, a 3 pin UART header
and a 40-pin GPIO header.
The added dts file is identical to the one submitted to the upstream
kernel.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
2016-03-23 08:59:23 +00:00
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};
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};
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wifi_pwrseq: wifi_pwrseq {
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compatible = "mmc-pwrseq-simple";
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reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 WIFI_EN */
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};
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};
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2018-07-04 13:16:38 +00:00
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&codec {
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allwinner,pa-gpios = <&pio 0 16 GPIO_ACTIVE_HIGH>; /* PA16 */
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allwinner,audio-routing =
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"Speaker", "LINEOUT",
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"MIC1", "Mic",
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"Mic", "MBIAS";
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status = "okay";
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};
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&de {
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status = "okay";
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};
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sunxi: Add defconfig and dts for Orange Pi 2 SBC
The Orange Pi 2 is a SBC based on the Allwinner H3 SoC with a uSD slot,
4 USB ports connected via a USB-2 hub, a 10/100M ethernet port using the
SoC's integrated PHY, Wifi via a RTL8189ETV sdio wifi chip, USB OTG, HDMI,
a TRRS headphone jack for stereo out and composite out, a microphone,
an IR receiver, a CSI connector, 2 LEDs, a 3 pin UART header
and a 40-pin GPIO header.
The added dts file is identical to the one submitted to the upstream
kernel.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
2016-03-23 08:59:23 +00:00
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&ehci1 {
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status = "okay";
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};
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2016-09-03 08:21:35 +00:00
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&emac {
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2018-04-04 00:31:18 +00:00
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phy-handle = <&int_mii_phy>;
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2016-09-03 08:21:35 +00:00
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phy-mode = "mii";
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allwinner,leds-active-low;
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status = "okay";
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};
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2018-07-04 13:16:38 +00:00
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&hdmi {
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status = "okay";
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};
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&hdmi_out {
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hdmi_out_con: endpoint {
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remote-endpoint = <&hdmi_con_in>;
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};
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};
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sunxi: Add defconfig and dts for Orange Pi 2 SBC
The Orange Pi 2 is a SBC based on the Allwinner H3 SoC with a uSD slot,
4 USB ports connected via a USB-2 hub, a 10/100M ethernet port using the
SoC's integrated PHY, Wifi via a RTL8189ETV sdio wifi chip, USB OTG, HDMI,
a TRRS headphone jack for stereo out and composite out, a microphone,
an IR receiver, a CSI connector, 2 LEDs, a 3 pin UART header
and a 40-pin GPIO header.
The added dts file is identical to the one submitted to the upstream
kernel.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
2016-03-23 08:59:23 +00:00
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&ir {
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pinctrl-names = "default";
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2020-01-12 15:36:13 +00:00
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pinctrl-0 = <&r_ir_rx_pin>;
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sunxi: Add defconfig and dts for Orange Pi 2 SBC
The Orange Pi 2 is a SBC based on the Allwinner H3 SoC with a uSD slot,
4 USB ports connected via a USB-2 hub, a 10/100M ethernet port using the
SoC's integrated PHY, Wifi via a RTL8189ETV sdio wifi chip, USB OTG, HDMI,
a TRRS headphone jack for stereo out and composite out, a microphone,
an IR receiver, a CSI connector, 2 LEDs, a 3 pin UART header
and a 40-pin GPIO header.
The added dts file is identical to the one submitted to the upstream
kernel.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
2016-03-23 08:59:23 +00:00
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status = "okay";
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};
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&mmc0 {
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vmmc-supply = <®_vcc3v3>;
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bus-width = <4>;
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2018-07-04 13:16:38 +00:00
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cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
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sunxi: Add defconfig and dts for Orange Pi 2 SBC
The Orange Pi 2 is a SBC based on the Allwinner H3 SoC with a uSD slot,
4 USB ports connected via a USB-2 hub, a 10/100M ethernet port using the
SoC's integrated PHY, Wifi via a RTL8189ETV sdio wifi chip, USB OTG, HDMI,
a TRRS headphone jack for stereo out and composite out, a microphone,
an IR receiver, a CSI connector, 2 LEDs, a 3 pin UART header
and a 40-pin GPIO header.
The added dts file is identical to the one submitted to the upstream
kernel.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
2016-03-23 08:59:23 +00:00
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status = "okay";
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};
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&mmc1 {
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vmmc-supply = <®_vcc3v3>;
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mmc-pwrseq = <&wifi_pwrseq>;
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bus-width = <4>;
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non-removable;
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status = "okay";
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2016-08-18 18:51:12 +00:00
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/*
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* Explicitly define the sdio device, so that we can add an ethernet
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* alias for it (which e.g. makes u-boot set a mac-address).
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*/
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rtl8189: sdio_wifi@1 {
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reg = <1>;
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};
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sunxi: Add defconfig and dts for Orange Pi 2 SBC
The Orange Pi 2 is a SBC based on the Allwinner H3 SoC with a uSD slot,
4 USB ports connected via a USB-2 hub, a 10/100M ethernet port using the
SoC's integrated PHY, Wifi via a RTL8189ETV sdio wifi chip, USB OTG, HDMI,
a TRRS headphone jack for stereo out and composite out, a microphone,
an IR receiver, a CSI connector, 2 LEDs, a 3 pin UART header
and a 40-pin GPIO header.
The added dts file is identical to the one submitted to the upstream
kernel.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
2016-03-23 08:59:23 +00:00
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};
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®_usb1_vbus {
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gpio = <&pio 6 13 GPIO_ACTIVE_HIGH>;
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status = "okay";
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};
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&uart0 {
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pinctrl-names = "default";
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2020-01-12 15:36:13 +00:00
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pinctrl-0 = <&uart0_pa_pins>;
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sunxi: Add defconfig and dts for Orange Pi 2 SBC
The Orange Pi 2 is a SBC based on the Allwinner H3 SoC with a uSD slot,
4 USB ports connected via a USB-2 hub, a 10/100M ethernet port using the
SoC's integrated PHY, Wifi via a RTL8189ETV sdio wifi chip, USB OTG, HDMI,
a TRRS headphone jack for stereo out and composite out, a microphone,
an IR receiver, a CSI connector, 2 LEDs, a 3 pin UART header
and a 40-pin GPIO header.
The added dts file is identical to the one submitted to the upstream
kernel.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
2016-03-23 08:59:23 +00:00
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status = "okay";
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};
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2018-07-04 13:16:38 +00:00
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&uart1 {
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pinctrl-names = "default";
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pinctrl-0 = <&uart1_pins>;
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status = "disabled";
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};
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&uart2 {
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pinctrl-names = "default";
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pinctrl-0 = <&uart2_pins>;
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status = "disabled";
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};
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&uart3 {
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pinctrl-names = "default";
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pinctrl-0 = <&uart3_pins>;
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status = "disabled";
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sunxi: Add defconfig and dts for Orange Pi 2 SBC
The Orange Pi 2 is a SBC based on the Allwinner H3 SoC with a uSD slot,
4 USB ports connected via a USB-2 hub, a 10/100M ethernet port using the
SoC's integrated PHY, Wifi via a RTL8189ETV sdio wifi chip, USB OTG, HDMI,
a TRRS headphone jack for stereo out and composite out, a microphone,
an IR receiver, a CSI connector, 2 LEDs, a 3 pin UART header
and a 40-pin GPIO header.
The added dts file is identical to the one submitted to the upstream
kernel.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
2016-03-23 08:59:23 +00:00
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};
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&usbphy {
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usb1_vbus-supply = <®_usb1_vbus>;
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status = "okay";
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};
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