2014-07-30 05:08:14 +00:00
|
|
|
CONFIG_PPC=y
|
2018-02-03 17:10:38 +00:00
|
|
|
CONFIG_SYS_TEXT_BASE=0xF0000000
|
2019-11-26 18:09:01 +00:00
|
|
|
CONFIG_KM_DEF_NETDEV="eth1"
|
2019-11-19 01:02:10 +00:00
|
|
|
CONFIG_ENV_SIZE=0x4000
|
|
|
|
CONFIG_ENV_SECT_SIZE=0x20000
|
2021-06-28 14:17:29 +00:00
|
|
|
CONFIG_DEFAULT_DEVICE_TREE="kmcoge5ne"
|
2020-02-06 18:42:52 +00:00
|
|
|
CONFIG_BOOTCOUNT_BOOTLIMIT=3
|
2019-01-21 08:17:53 +00:00
|
|
|
CONFIG_SYS_CLK_FREQ=66000000
|
2014-07-30 05:08:14 +00:00
|
|
|
CONFIG_MPC83xx=y
|
2019-01-21 08:17:56 +00:00
|
|
|
CONFIG_HIGH_BATS=y
|
2019-01-21 08:17:35 +00:00
|
|
|
CONFIG_TARGET_KMCOGE5NE=y
|
2019-01-21 08:17:54 +00:00
|
|
|
CONFIG_DDR_MC_CLOCK_MODE_1_1=y
|
|
|
|
CONFIG_SYSTEM_PLL_VCO_DIV_4=y
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|
|
|
CONFIG_SYSTEM_PLL_FACTOR_4_1=y
|
|
|
|
CONFIG_CORE_PLL_RATIO_2_1=y
|
|
|
|
CONFIG_QUICC_MULT_FACTOR_6=y
|
|
|
|
CONFIG_BOOT_MEMORY_SPACE_LOW=y
|
|
|
|
CONFIG_BOOT_ROM_INTERFACE_GPCM_16BIT=y
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|
|
|
CONFIG_LALE_TIMING_EARLIER=y
|
|
|
|
CONFIG_LDP_PIN_MUX_STATE_0=y
|
2019-01-21 08:17:57 +00:00
|
|
|
CONFIG_BAT0=y
|
|
|
|
CONFIG_BAT0_NAME="SDRAM_LOWER"
|
|
|
|
CONFIG_BAT0_BASE=0x00000000
|
|
|
|
CONFIG_BAT0_LENGTH_256_MBYTES=y
|
|
|
|
CONFIG_BAT0_ACCESS_RW=y
|
|
|
|
CONFIG_BAT0_ICACHE_INHIBITED=y
|
|
|
|
CONFIG_BAT0_ICACHE_GUARDED=y
|
|
|
|
CONFIG_BAT0_DCACHE_INHIBITED=y
|
|
|
|
CONFIG_BAT0_DCACHE_GUARDED=y
|
|
|
|
CONFIG_BAT0_USER_MODE_VALID=y
|
|
|
|
CONFIG_BAT0_SUPERVISOR_MODE_VALID=y
|
|
|
|
CONFIG_BAT1=y
|
|
|
|
CONFIG_BAT1_NAME="IMMR"
|
|
|
|
CONFIG_BAT1_BASE=0xE0000000
|
|
|
|
CONFIG_BAT1_LENGTH_4_MBYTES=y
|
|
|
|
CONFIG_BAT1_ACCESS_RW=y
|
|
|
|
CONFIG_BAT1_ICACHE_INHIBITED=y
|
|
|
|
CONFIG_BAT1_ICACHE_GUARDED=y
|
|
|
|
CONFIG_BAT1_DCACHE_INHIBITED=y
|
|
|
|
CONFIG_BAT1_DCACHE_GUARDED=y
|
|
|
|
CONFIG_BAT1_USER_MODE_VALID=y
|
|
|
|
CONFIG_BAT1_SUPERVISOR_MODE_VALID=y
|
|
|
|
CONFIG_BAT2=y
|
|
|
|
CONFIG_BAT2_NAME="KMBEC_FPGA"
|
|
|
|
CONFIG_BAT2_BASE=0xE8000000
|
|
|
|
CONFIG_BAT2_LENGTH_128_MBYTES=y
|
|
|
|
CONFIG_BAT2_ACCESS_RW=y
|
|
|
|
CONFIG_BAT2_ICACHE_MEMORYCOHERENCE=y
|
|
|
|
CONFIG_BAT2_DCACHE_INHIBITED=y
|
|
|
|
CONFIG_BAT2_DCACHE_GUARDED=y
|
|
|
|
CONFIG_BAT2_USER_MODE_VALID=y
|
|
|
|
CONFIG_BAT2_SUPERVISOR_MODE_VALID=y
|
|
|
|
CONFIG_BAT3=y
|
|
|
|
CONFIG_BAT3_NAME="FLASH"
|
|
|
|
CONFIG_BAT3_BASE=0xF0000000
|
|
|
|
CONFIG_BAT3_LENGTH_256_MBYTES=y
|
|
|
|
CONFIG_BAT3_ACCESS_RW=y
|
|
|
|
CONFIG_BAT3_ICACHE_MEMORYCOHERENCE=y
|
|
|
|
CONFIG_BAT3_DCACHE_INHIBITED=y
|
|
|
|
CONFIG_BAT3_DCACHE_GUARDED=y
|
|
|
|
CONFIG_BAT3_USER_MODE_VALID=y
|
|
|
|
CONFIG_BAT3_SUPERVISOR_MODE_VALID=y
|
|
|
|
CONFIG_BAT4=y
|
|
|
|
CONFIG_BAT4_NAME="STACK_IN_DCACHE"
|
|
|
|
CONFIG_BAT4_BASE=0xE6000000
|
|
|
|
CONFIG_BAT4_ACCESS_RW=y
|
|
|
|
CONFIG_BAT4_USER_MODE_VALID=y
|
|
|
|
CONFIG_BAT4_SUPERVISOR_MODE_VALID=y
|
|
|
|
CONFIG_BAT5=y
|
|
|
|
CONFIG_BAT5_NAME="PAXE"
|
|
|
|
CONFIG_BAT5_BASE=0xA0000000
|
|
|
|
CONFIG_BAT5_LENGTH_256_MBYTES=y
|
|
|
|
CONFIG_BAT5_ACCESS_RW=y
|
|
|
|
CONFIG_BAT5_ICACHE_MEMORYCOHERENCE=y
|
|
|
|
CONFIG_BAT5_DCACHE_INHIBITED=y
|
|
|
|
CONFIG_BAT5_DCACHE_GUARDED=y
|
|
|
|
CONFIG_BAT5_USER_MODE_VALID=y
|
|
|
|
CONFIG_BAT5_SUPERVISOR_MODE_VALID=y
|
|
|
|
CONFIG_BAT6=y
|
|
|
|
CONFIG_BAT6_NAME="BFTIC3"
|
|
|
|
CONFIG_BAT6_BASE=0xB0000000
|
|
|
|
CONFIG_BAT6_LENGTH_256_MBYTES=y
|
|
|
|
CONFIG_BAT6_ACCESS_RW=y
|
|
|
|
CONFIG_BAT6_ICACHE_MEMORYCOHERENCE=y
|
|
|
|
CONFIG_BAT6_DCACHE_INHIBITED=y
|
|
|
|
CONFIG_BAT6_DCACHE_GUARDED=y
|
|
|
|
CONFIG_BAT6_USER_MODE_VALID=y
|
|
|
|
CONFIG_BAT6_SUPERVISOR_MODE_VALID=y
|
|
|
|
CONFIG_BAT7=y
|
|
|
|
CONFIG_BAT7_NAME="SDRAM_UPPER"
|
|
|
|
CONFIG_BAT7_BASE=0x10000000
|
|
|
|
CONFIG_BAT7_LENGTH_256_MBYTES=y
|
|
|
|
CONFIG_BAT7_ACCESS_RW=y
|
|
|
|
CONFIG_BAT7_ICACHE_INHIBITED=y
|
|
|
|
CONFIG_BAT7_ICACHE_GUARDED=y
|
|
|
|
CONFIG_BAT7_DCACHE_INHIBITED=y
|
|
|
|
CONFIG_BAT7_DCACHE_GUARDED=y
|
|
|
|
CONFIG_BAT7_USER_MODE_VALID=y
|
|
|
|
CONFIG_BAT7_SUPERVISOR_MODE_VALID=y
|
2019-01-21 08:17:58 +00:00
|
|
|
CONFIG_LBLAW0=y
|
|
|
|
CONFIG_LBLAW0_BASE=0xF0000000
|
|
|
|
CONFIG_LBLAW0_NAME="FLASH"
|
|
|
|
CONFIG_LBLAW0_LENGTH_256_MBYTES=y
|
|
|
|
CONFIG_LBLAW1=y
|
|
|
|
CONFIG_LBLAW1_BASE=0xE8000000
|
|
|
|
CONFIG_LBLAW1_NAME="KMBEC_FPGA"
|
|
|
|
CONFIG_LBLAW1_LENGTH_128_MBYTES=y
|
|
|
|
CONFIG_LBLAW3=y
|
|
|
|
CONFIG_LBLAW3_BASE=0xA0000000
|
|
|
|
CONFIG_LBLAW3_NAME="PAXE"
|
|
|
|
CONFIG_LBLAW3_LENGTH_512_MBYTES=y
|
2019-05-26 18:45:25 +00:00
|
|
|
CONFIG_ELBC_BR0_OR0=y
|
|
|
|
CONFIG_BR0_OR0_NAME="FLASH"
|
|
|
|
CONFIG_BR0_OR0_BASE=0xF0000000
|
|
|
|
CONFIG_BR0_PORTSIZE_16BIT=y
|
|
|
|
CONFIG_OR0_AM_256_MBYTES=y
|
|
|
|
CONFIG_OR0_SCY_5=y
|
|
|
|
CONFIG_OR0_CSNT_EARLIER=y
|
|
|
|
CONFIG_OR0_ACS_HALF_CYCLE_EARLIER=y
|
|
|
|
CONFIG_OR0_TRLX_RELAXED=y
|
|
|
|
CONFIG_OR0_EAD_EXTRA=y
|
|
|
|
CONFIG_ELBC_BR1_OR1=y
|
|
|
|
CONFIG_BR1_OR1_NAME="KMBEC_FPGA"
|
|
|
|
CONFIG_BR1_OR1_BASE=0xE8000000
|
|
|
|
CONFIG_OR1_AM_64_MBYTES=y
|
|
|
|
CONFIG_OR1_SCY_2=y
|
|
|
|
CONFIG_OR1_CSNT_EARLIER=y
|
|
|
|
CONFIG_OR1_ACS_HALF_CYCLE_EARLIER=y
|
|
|
|
CONFIG_OR1_TRLX_RELAXED=y
|
|
|
|
CONFIG_OR1_EAD_EXTRA=y
|
|
|
|
CONFIG_ELBC_BR3_OR3=y
|
|
|
|
CONFIG_BR3_OR3_NAME="PAXE"
|
|
|
|
CONFIG_BR3_OR3_BASE=0xA0000000
|
|
|
|
CONFIG_OR3_AM_256_MBYTES=y
|
|
|
|
CONFIG_OR3_SCY_2=y
|
|
|
|
CONFIG_OR3_CSNT_EARLIER=y
|
|
|
|
CONFIG_OR3_ACS_HALF_CYCLE_EARLIER=y
|
|
|
|
CONFIG_OR3_TRLX_RELAXED=y
|
|
|
|
CONFIG_OR3_EAD_EXTRA=y
|
|
|
|
CONFIG_ELBC_BR4_OR4=y
|
|
|
|
CONFIG_BR4_OR4_NAME="BFTIC3"
|
|
|
|
CONFIG_BR4_OR4_BASE=0xB0000000
|
|
|
|
CONFIG_OR4_AM_256_MBYTES=y
|
|
|
|
CONFIG_OR4_SCY_2=y
|
|
|
|
CONFIG_OR4_CSNT_EARLIER=y
|
|
|
|
CONFIG_OR4_ACS_HALF_CYCLE_EARLIER=y
|
|
|
|
CONFIG_OR4_TRLX_RELAXED=y
|
|
|
|
CONFIG_OR4_EAD_EXTRA=y
|
2019-01-21 08:18:09 +00:00
|
|
|
CONFIG_HID0_FINAL_EMCP=y
|
|
|
|
CONFIG_HID0_FINAL_ICE=y
|
|
|
|
CONFIG_HID2_HBE=y
|
2019-01-21 08:18:12 +00:00
|
|
|
CONFIG_ACR_PIPE_DEP_4=y
|
|
|
|
CONFIG_ACR_RPTCNT_4=y
|
|
|
|
CONFIG_ACR_APARK_MASTER=y
|
|
|
|
CONFIG_ACR_PARKM_USB_I2C1_BOOT=y
|
2019-05-26 18:45:25 +00:00
|
|
|
CONFIG_LCRR_DBYP_PLL_BYPASSED=y
|
|
|
|
CONFIG_LCRR_EADC_2=y
|
|
|
|
CONFIG_LCRR_CLKDIV_4=y
|
2021-08-23 14:25:31 +00:00
|
|
|
CONFIG_SYS_LOAD_ADDR=0x100000
|
2016-02-23 05:55:43 +00:00
|
|
|
CONFIG_OF_BOARD_SETUP=y
|
|
|
|
CONFIG_OF_STDOUT_VIA_ALIAS=y
|
2016-04-22 20:41:25 +00:00
|
|
|
CONFIG_AUTOBOOT_KEYED=y
|
|
|
|
CONFIG_AUTOBOOT_PROMPT="Hit <SPACE> key to stop autoboot in %2ds\n"
|
|
|
|
CONFIG_AUTOBOOT_STOP_STR=" "
|
2020-10-09 16:22:06 +00:00
|
|
|
CONFIG_BOARD_EARLY_INIT_R=y
|
|
|
|
CONFIG_LAST_STAGE_INIT=y
|
|
|
|
CONFIG_MISC_INIT_R=y
|
|
|
|
CONFIG_HUSH_PARSER=y
|
2017-10-08 18:48:01 +00:00
|
|
|
CONFIG_CMD_IMLS=y
|
2016-04-24 21:29:26 +00:00
|
|
|
CONFIG_CMD_ASKENV=y
|
|
|
|
CONFIG_CMD_GREPENV=y
|
2017-05-17 09:25:10 +00:00
|
|
|
CONFIG_CMD_EEPROM=y
|
2021-08-17 21:59:45 +00:00
|
|
|
CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2
|
|
|
|
CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3
|
|
|
|
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=10
|
2016-04-22 20:41:25 +00:00
|
|
|
CONFIG_CMD_I2C=y
|
2017-08-14 23:58:53 +00:00
|
|
|
CONFIG_CMD_NAND=y
|
2020-02-03 06:43:57 +00:00
|
|
|
# CONFIG_CMD_PINMUX is not set
|
2016-04-22 20:41:25 +00:00
|
|
|
CONFIG_CMD_DHCP=y
|
2016-04-24 21:29:26 +00:00
|
|
|
CONFIG_CMD_MII=y
|
2016-04-22 20:41:25 +00:00
|
|
|
CONFIG_CMD_PING=y
|
2017-05-17 09:25:37 +00:00
|
|
|
CONFIG_CMD_JFFS2=y
|
2018-11-14 00:54:45 +00:00
|
|
|
CONFIG_CMD_MTDPARTS=y
|
2017-10-22 21:55:07 +00:00
|
|
|
CONFIG_MTDIDS_DEFAULT="nor0=boot,nand0=app"
|
|
|
|
CONFIG_MTDPARTS_DEFAULT="mtdparts=boot:768k(u-boot),128k(env),128k(envred),-(ubi0);app:-(ubi1);"
|
2016-09-21 05:58:19 +00:00
|
|
|
CONFIG_CMD_UBI=y
|
2017-07-22 22:36:16 +00:00
|
|
|
# CONFIG_CMD_UBIFS is not set
|
2020-07-03 11:48:56 +00:00
|
|
|
CONFIG_ENV_OVERWRITE=y
|
2019-11-10 16:28:03 +00:00
|
|
|
CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
|
2019-11-19 01:02:10 +00:00
|
|
|
CONFIG_ENV_ADDR=0xF00C0000
|
|
|
|
CONFIG_ENV_ADDR_REDUND=0xF00E0000
|
2020-10-09 16:22:06 +00:00
|
|
|
CONFIG_VERSION_VARIABLE=y
|
2018-02-09 22:50:57 +00:00
|
|
|
CONFIG_BOOTCOUNT_LIMIT=y
|
2020-02-03 06:43:57 +00:00
|
|
|
CONFIG_DM_BOOTCOUNT=y
|
|
|
|
CONFIG_BOOTCOUNT_MEM=y
|
2021-08-19 03:12:24 +00:00
|
|
|
CONFIG_SYS_I2C_LEGACY=y
|
2021-08-19 03:12:35 +00:00
|
|
|
CONFIG_SYS_I2C_FSL=y
|
|
|
|
CONFIG_SYS_FSL_I2C_OFFSET=0x3000
|
|
|
|
CONFIG_SYS_FSL_HAS_I2C2_OFFSET=y
|
|
|
|
CONFIG_SYS_FSL_I2C2_OFFSET=0x3100
|
|
|
|
CONFIG_SYS_I2C_SLAVE=0x7F
|
|
|
|
CONFIG_SYS_I2C_SPEED=200000
|
2017-03-13 17:48:42 +00:00
|
|
|
# CONFIG_MMC is not set
|
2019-12-04 22:18:38 +00:00
|
|
|
CONFIG_MTD=y
|
2017-02-11 13:43:54 +00:00
|
|
|
CONFIG_MTD_NOR_FLASH=y
|
2018-10-14 20:10:50 +00:00
|
|
|
CONFIG_FLASH_CFI_DRIVER=y
|
|
|
|
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
|
|
|
|
CONFIG_FLASH_CFI_MTD=y
|
|
|
|
CONFIG_SYS_FLASH_PROTECTION=y
|
|
|
|
CONFIG_SYS_FLASH_CFI=y
|
2019-12-04 22:18:38 +00:00
|
|
|
CONFIG_MTD_RAW_NAND=y
|
2020-02-03 06:43:57 +00:00
|
|
|
CONFIG_DM_ETH_PHY=y
|
|
|
|
CONFIG_QE_UEC=y
|
2016-10-26 21:15:37 +00:00
|
|
|
# CONFIG_PCI is not set
|
2020-02-03 06:43:57 +00:00
|
|
|
# CONFIG_PINCTRL_FULL is not set
|
2019-05-12 11:59:12 +00:00
|
|
|
CONFIG_QE=y
|
2015-11-19 13:48:14 +00:00
|
|
|
CONFIG_SYS_NS16550=y
|
2017-08-11 14:46:05 +00:00
|
|
|
CONFIG_BCH=y
|