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Author SHA1 Message Date
Asahi Lina
c746549c2e hv: Map RAM via tracer infra, handle carveouts in Python 
Previously RAM was mapped ad-hoc, but this can end up interacting
poorly with the tracer infrastructure which we are now using for RAM
too. Move to mapping guest RAM via the tracer infra, and also unmap the
TZ carveouts in the Python side so it knows about them.

This is a HV ABI break.

Signed-off-by: Asahi Lina <lina@asahilina.net>
 2022-05-21 03:54:12 +09:00
Asahi Lina
30c4503966 m1n1.hv: Support names and bases for PrintTracers 
Signed-off-by: Asahi Lina <lina@asahilina.net>
 2022-05-21 03:54:12 +09:00
Asahi Lina
22228934bd m1n1.fw.agx.channels: EventMsg structure 
Signed-off-by: Asahi Lina <lina@asahilina.net>
 2022-05-21 03:54:12 +09:00
Asahi Lina
b88785fa58 hv_vm: Add 32-bit LDP emulation 
Signed-off-by: Asahi Lina <lina@asahilina.net>
 2022-05-21 03:54:12 +09:00
Asahi Lina
6b6dfde814 m1n1.fw.agx: Lots of GPU work 
Signed-off-by: Asahi Lina <lina@asahilina.net>
 2022-05-21 03:54:10 +09:00
Asahi Lina
dc21c15537 m1n1.fw.agx.channels/initdata: Use __repr__ instead of __str__ 
Signed-off-by: Asahi Lina <lina@asahilina.net>
 2022-05-21 03:52:43 +09:00
Asahi Lina
08c34dbc37 hv/trace_agx.py: Reload some stuff 
Signed-off-by: Asahi Lina <lina@asahilina.net>
 2022-05-21 03:52:43 +09:00
Asahi Lina
dc4673c03b m1n1.constructutils: Propagate force arg in _reloadcls() 
Signed-off-by: Asahi Lina <lina@asahilina.net>
 2022-05-21 03:52:43 +09:00
Asahi Lina
57d23f8491 m1n1.constructutils: Use repr() instead of str() 
Signed-off-by: Asahi Lina <lina@asahilina.net>
 2022-05-21 03:52:43 +09:00
Scott Mansell
a17e9e4f5e m1n1.fw.agx: WIP generate initdata 
Signed-off-by: Scott Mansell <phiren@gmail.com>
 2022-05-21 03:52:43 +09:00
Scott Mansell
79b01a7bcb m1n1.fw.agx: enough of a driver to boot gfx-asc 
Signed-off-by: Scott Mansell <phiren@gmail.com>
 2022-05-21 03:52:32 +09:00
Scott Mansell
fe9c1f4bca m1n1.hw.uat: Implement iomap 
Signed-off-by: Scott Mansell <phiren@gmail.com>
 2022-05-21 03:52:32 +09:00
Scott Mansell
43e3e0f3c2 m1n1.hw.uat: Reflect ARMv8 nature 
Signed-off-by: Scott Mansell <phiren@gmail.com>
 2022-05-21 03:52:32 +09:00
Scott Mansell
f72417b78f m1n1.trace.agx: Add support for Work submission 
Signed-off-by: Scott Mansell <phiren@gmail.com>
 2022-05-21 03:52:32 +09:00
Scott Mansell
636ebe70d7 m1n1.hw.uat: Allow accessing as a stream 
This allows us to use construct's Pointer

Signed-off-by: Scott Mansell <phiren@gmail.com>
 2022-05-21 03:52:32 +09:00
Scott Mansell
804e944a1b m1n1.constructutils: Add ConstructClass wrapper around construct 
Signed-off-by: Scott Mansell <phiren@gmail.com>
 2022-05-21 03:52:32 +09:00
Scott Mansell
42edf41e37 m1n1.hw.uat: fix VA_MASK 
Was missing the lowest bits, which broke unaligned reads/writes

Signed-off-by: Scott Mansell <phiren@gmail.com>
 2022-05-21 03:52:32 +09:00
Scott Mansell
980b9241d2 m1n1.trace.agx: Trace AGX wip 
Signed-off-by: Scott Mansell <phiren@gmail.com>
 2022-05-21 03:46:36 +09:00
Scott Mansell
90eae66b33 m1n1.hw.uat: Intitial UAT implementaiton 
Signed-off-by: Scott Mansell <phiren@gmail.com>
 2022-05-21 03:46:26 +09:00
Scott Mansell
254f01b3ea m1n1.proxyutils.RegMon: Allow custom read lambda 
Useful for monitoring ranges beind an iommu

Signed-off-by: Scott Mansell <phiren@gmail.com>
 2022-05-21 03:46:14 +09:00
Hector Martin
52bb64b86c hv_exc: Do not forget to arm tick in fast path 
Signed-off-by: Hector Martin <marcan@marcan.st>
 2022-04-20 00:38:22 +09:00
Hector Martin
e750dfcca1 hv_exc: Improve multi-core scalability 
The HV tick polling now only runs on CPU#0. All CPUs have the 1000Hz
HV tick, but secondaries only use it to poll the FIQ state and that path
does not take the BHL if no other FIQ was pending.

Signed-off-by: Hector Martin <marcan@marcan.st>
 2022-04-20 00:20:58 +09:00
Hector Martin
3020e26e00 dart: Announce real-time DARTs 
Mostly just for reference.

Signed-off-by: Hector Martin <marcan@marcan.st>
 2022-04-19 23:42:22 +09:00
Hector Martin
fabe27e3f1 memory: Remap some carveouts as uncached 
This fixes display DART real-time cache hits causing AMCC exceptions.

The relevant carve-outs have flags 0x60004016; 0x60004002 is used for
DCP which is non-realtime, so I'm guessing the '16' means we should map
it uncached.

Signed-off-by: Hector Martin <marcan@marcan.st>
 2022-04-19 23:41:17 +09:00
Hector Martin
144c3da78e experiments/amcc_err_handler.py: New old thing to dump AMCC errors 2022-04-19 23:32:11 +09:00
Janne Grunau
d4637513e0 WIP: m1n1.hv: add support for starting CPUs on the second M1 Ultra die 
notes:
 - macos guest only works if the display is not initialized
 - macos guest appears to be very slow

Signed-off-by: Janne Grunau <j@jannau.net>
 2022-04-19 21:39:52 +09:00
Janne Grunau
6df73d80ee cpufreq: Add support for t6002 
Signed-off-by: Janne Grunau <j@jannau.net>
 2022-04-19 21:39:52 +09:00
Janne Grunau
4aa4ff98b6 smp: Start CPU cores on the second t6002 die 
Signed-off-by: Janne Grunau <j@jannau.net>
 2022-04-19 21:39:52 +09:00
Hector Martin
8df40df17e nvme: Support nvme on die 1 for t6002 
Signed-off-by: Hector Martin <marcan@marcan.st>
 2022-04-19 21:39:52 +09:00
Janne Grunau
6256baca04 pmgr: Add multi-die support for t6002 
Signed-off-by: Janne Grunau <j@jannau.net>
 2022-04-19 21:39:52 +09:00
Janne Grunau
76fd226f7c aic: Add support for multi-die AIC2 as seen on the M1 Ultra 
Multi-die IRQs are coded as in the ADT: die * max_irq + num

Signed-off-by: Janne Grunau <j@jannau.net>
 2022-04-19 21:29:30 +09:00
Janne Grunau
524cb4a34f soc: Add target for t6002 
Signed-off-by: Janne Grunau <j@jannau.net>
 2022-04-19 21:29:30 +09:00
Janne Grunau
1b5dee2496 display: Map the framebuffer if it is not mapped 
iboot on Mac Studio (M1 Ultra) does not map the framebuffer("/vram")
for dcp and disp0.

Signed-off-by: Janne Grunau <j@jannau.net>
 2022-04-19 21:29:30 +09:00
Janne Grunau
0104abbea7 dart: Add dart_find_iova() to find unused IOVA space 
Signed-off-by: Janne Grunau <j@jannau.net>
 2022-04-19 21:29:30 +09:00
R
90479ac755 jpeg: Add documentation 
Signed-off-by: R <rqou@berkeley.edu>
 2022-04-16 19:40:44 +09:00
R
04fc26639b jpeg: Unbreak encode for RGB formats 
Signed-off-by: R <rqou@berkeley.edu>
 2022-04-16 19:40:44 +09:00
R
d28ab8cc81 jpeg: Figured out how to activate tiling 
Signed-off-by: R <rqou@berkeley.edu>
 2022-04-16 19:40:44 +09:00
R
b2a0352a8f jpeg: Implement encoding from planar formats 
Signed-off-by: R <rqou@berkeley.edu>
 2022-04-16 19:40:44 +09:00
R
f2b8054309 jpeg: Support encoding linear YUV 
Signed-off-by: R <rqou@berkeley.edu>
 2022-04-16 19:40:44 +09:00
R
c71d341ff1 jpeg: Implement YUV10 mode for encoding 
Signed-off-by: R <rqou@berkeley.edu>
 2022-04-16 19:40:44 +09:00
R
4681053ea9 jpeg: Implement encoding other RGB formats 
Signed-off-by: R <rqou@berkeley.edu>
 2022-04-16 19:40:44 +09:00
R
970b2789d0 jpeg: Implement encoding subsampling modes 
Signed-off-by: R <rqou@berkeley.edu>
 2022-04-16 19:40:44 +09:00
R
45876d09a1 jpeg: Import working encode experiment 
Signed-off-by: R <rqou@berkeley.edu>
 2022-04-16 19:40:44 +09:00
R
9fca773c8f jpeg: Implement decoding into planar formats 
Signed-off-by: R <rqou@berkeley.edu>
 2022-04-16 19:40:44 +09:00
R
3a18075d89 jpeg: Decode linear YUV 
Signed-off-by: R <rqou@berkeley.edu>
 2022-04-16 19:40:44 +09:00
R
4c8807fcca jpeg: Add RGB565 to decoder 
Note that dithering does not get configured

Signed-off-by: R <rqou@berkeley.edu>
 2022-04-16 19:40:44 +09:00
R
7350baf58b jpeg: Implement decoding other subsampling modes 
Signed-off-by: R <rqou@berkeley.edu>
 2022-04-16 19:40:44 +09:00
R
0c1f89d1f9 jpeg: Import working basic decode experiment 
Signed-off-by: R <rqou@berkeley.edu>
 2022-04-16 19:40:44 +09:00
R
49cdf7fe22 jpeg: probe registers more thoroughly 
Signed-off-by: R <rqou@berkeley.edu>
 2022-04-16 19:40:44 +09:00
R
c6169c1c15 jpeg: Import register definitions 
This comes from experiments that were performed out-of-tree

Signed-off-by: R <rqou@berkeley.edu>
 2022-04-16 19:40:44 +09:00