Hector Martin
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0265edebba
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hv_exc: Add ACTLR_EL1 sysreg forwarding
Signed-off-by: Hector Martin <marcan@marcan.st>
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2021-05-28 00:37:48 +09:00 |
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Hector Martin
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b1f55015eb
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arm_cpu_regs.h: Add sysreg exception ISS bit defines
Signed-off-by: Hector Martin <marcan@marcan.st>
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2021-05-25 20:12:20 +09:00 |
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Hector Martin
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74b8863a7f
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arm_cpu_regs.h: Add timer bit defines
Signed-off-by: Hector Martin <marcan@marcan.st>
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2021-05-25 20:12:20 +09:00 |
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Sven Peter
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36efdd2ac3
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allow cpu_regs.h to be included in .S files
Signed-off-by: Sven Peter <sven@svenpeter.dev>
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2021-05-11 15:48:40 +09:00 |
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Hector Martin
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4c043a0f97
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memory: Move SCTLR/TCR defines to arm_cpu_regs.h
Signed-off-by: Hector Martin <marcan@marcan.st>
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2021-05-09 03:25:51 +09:00 |
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Hector Martin
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9407dba2e0
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hv_vm: Initial data abort handling
Supports software-mapping for a subset of ldr/str instructions.
Signed-off-by: Hector Martin <marcan@marcan.st>
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2021-05-05 04:03:44 +09:00 |
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Hector Martin
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50f112c396
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hv: Add support for address translation & abort decoding
Signed-off-by: Hector Martin <marcan@marcan.st>
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2021-05-05 00:28:39 +09:00 |
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Hector Martin
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4cc0f45c9d
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arm_cpu_regs.h: Add SYS_ESR_EL2
Signed-off-by: Hector Martin <marcan@marcan.st>
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2021-05-04 19:25:46 +09:00 |
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Hector Martin
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1ae60ad715
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hv: Beginnings of a hypervisor
Signed-off-by: Hector Martin <marcan@marcan.st>
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2021-05-01 19:21:33 +09:00 |
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