Hector Martin
2389fa9d3d
m1n1.adt: Fix parsing of template ADTs
...
Adding the speaker calibration stuff broke it because we try to parse
template values as real values. Don't do that.
Signed-off-by: Hector Martin <marcan@marcan.st>
2023-04-09 19:46:13 +09:00
Hector Martin
fe104d3848
m1n1.hv: Also hook ATC_AON device
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It seems 13.2 is messing with this now.
Signed-off-by: Hector Martin <marcan@marcan.st>
2023-04-09 19:46:13 +09:00
Hector Martin
795211c534
m1n1.fw.dcp.ipc: More fields
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Signed-off-by: Hector Martin <marcan@marcan.st>
2023-04-09 19:46:13 +09:00
Mario Hros
2f96635420
mcc: Reuse existing T6000 impl for T6020
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Signed-off-by: Mario Hros <git@reversity.org>
2023-04-09 19:46:13 +09:00
Mario Hros
693ebbae2b
m1n1.hv: Support T6021 cpustart offset
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Signed-off-by: Mario Hros <git@reversity.org>
2023-04-09 19:46:13 +09:00
Mario Hros
049bc64e36
smp: Add T6021 CPU start offset
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Signed-off-by: Mario Hros <git@reversity.org>
2023-04-09 19:46:13 +09:00
Mario Hros
da03138eec
cpufreq: Add T6021 clusters
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Signed-off-by: Mario Hros <git@reversity.org>
2023-04-09 19:46:13 +09:00
Mario Hros
69012c0702
experiments/cpu_pstate_latencies.py: Extend for T6021
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Signed-off-by: Mario Hros <git@reversity.org>
2023-04-09 19:46:12 +09:00
Mario Hros
e71ad13474
chickens: Add preliminary T6020 support
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Signed-off-by: Mario Hros <git@reversity.org>
2023-04-09 19:46:12 +09:00
Mario Hros
afb68db34c
chickens: Force nonspec for rev 0x0 of Avalanche
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Signed-off-by: Mario Hros <git@reversity.org>
2023-04-09 19:46:12 +09:00
Mario Hros
2e040a6729
chickens: Add T6021 chickens
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Signed-off-by: Mario Hros <git@reversity.org>
2023-04-09 17:56:01 +09:00
Mario Hros
d033044a80
soc: Add T6021 defines
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Signed-off-by: Mario Hros <git@reversity.org>
2023-04-09 17:56:01 +09:00
Mario Hros
34f49a56fc
nvme: assume die 0 if clock-gates not set
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Signed-off-by: Mario Hros <git@reversity.org>
2023-04-09 17:56:01 +09:00
Asahi Lina
8bf08b0ff1
linux.py: Implement TSO
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Signed-off-by: Asahi Lina <lina@asahilina.net>
2023-03-28 19:06:20 +09:00
Asahi Lina
fa3dcd3e77
payload: Add tso=1
m1n1 option to enable TSO
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Signed-off-by: Asahi Lina <lina@asahilina.net>
2023-03-28 19:06:20 +09:00
Asahi Lina
0a05a0171e
proxy: Add smp_is_alive() thunk
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Signed-off-by: Asahi Lina <lina@asahilina.net>
2023-03-28 19:06:20 +09:00
Eileen Yoon
4a679b12bd
tunables_static: improve sequence iter
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Signed-off-by: Eileen Yoon <eyn@gmx.com>
2023-03-28 17:19:45 +09:00
Eileen Yoon
2abf3af38e
tunables_static: add t8103 ane tunables
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Signed-off-by: Eileen Yoon <eyn@gmx.com>
2023-03-28 17:19:45 +09:00
Eileen Yoon
cf09e4ff56
tunables_static: abstraction to reuse entries
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Signed-off-by: Eileen Yoon <eyn@gmx.com>
2023-03-28 17:19:45 +09:00
Eileen Yoon
6ce14d8735
m1n1/ane: Initial commit
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Signed-off-by: Eileen Yoon <eyn@gmx.com>
2023-03-28 17:10:15 +09:00
Hector Martin
a633b90634
kboot: Remove leftover IPD lookup dead code
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Signed-off-by: Hector Martin <marcan@marcan.st>
2023-03-19 20:30:01 +09:00
Hector Martin
a024101b75
kboot: Pass keyboard layout ID & country code in HID device
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Signed-off-by: Hector Martin <marcan@marcan.st>
2023-03-19 18:14:44 +09:00
Hector Martin
8be0596ae8
experiments/mtp.py: Fix DART stuff
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Signed-off-by: Hector Martin <marcan@marcan.st>
2023-03-15 13:54:35 +09:00
Janne Grunau
c6c426581b
pcie: Add link speed override for SD card reader
...
The SD card reader on Macbook Pro 14"/16" and Mac Studio uses yet
another property to override the port's "maximum-link-speed" property.
Add parsing for "expected-link-speed" and always look in the port's
first child for these properties.
Increases the link speed to PCIe 2.0 which is required for the full
bandwidth of SDXC UHS-II.
Signed-off-by: Janne Grunau <j@jannau.net>
2023-03-12 00:32:10 +09:00
Arminder Singh (amarioguy)
8adf619cb5
Document HACR_EL2[56] and it's purpose
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Signed-off-by: Arminder Singh (amarioguy) <arminders208@outlook.com>
2023-03-12 00:31:47 +09:00
Hector Martin
43a737b608
m1n1.adt: Add speaker calibration parsing
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Signed-off-by: Hector Martin <marcan@marcan.st>
2023-03-11 20:09:57 +09:00
Asahi Lina
7ad099a5b6
m1n1.trace.agx: Add exploit mitigation
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Signed-off-by: Asahi Lina <lina@asahilina.net>
2023-03-06 15:15:17 +09:00
Asahi Lina
6d3e594903
m1n1.hv: Fix read-only or write-only hooks
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Signed-off-by: Asahi Lina <lina@asahilina.net>
2023-03-06 15:15:17 +09:00
Asahi Lina
5cacbdc501
m1n1.fw.agx.initdata: Define buffer manager ctl fields better
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Signed-off-by: Asahi Lina <lina@asahilina.net>
2023-03-06 15:15:17 +09:00
Asahi Lina
90f4957725
experiments/agx_xtest.py: Here be exploits!
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Signed-off-by: Asahi Lina <lina@asahilina.net>
2023-03-06 15:15:17 +09:00
Asahi Lina
3548d4d210
m1n1.fw.ags.microsequence: Add more ops
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Signed-off-by: Asahi Lina <lina@asahilina.net>
2023-03-06 15:15:17 +09:00
Asahi Lina
e8377889d2
m1n1.proxyutils: Add 13.0 beta5/6 versions
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Signed-off-by: Asahi Lina <lina@asahilina.net>
2023-03-06 15:15:17 +09:00
Asahi Lina
c35168bb88
m1n1.hw.uat: Gracefully handle inaccessible page tables
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Signed-off-by: Asahi Lina <lina@asahilina.net>
2023-03-06 15:15:17 +09:00
Asahi Lina
b063fde19a
m1n1.hw.uat: Support block maps
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Signed-off-by: Asahi Lina <lina@asahilina.net>
2023-03-06 15:15:17 +09:00
Asahi Lina
bfaf358f82
m1n1.agx.render: Add microsequence hooks
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Signed-off-by: Asahi Lina <lina@asahilina.net>
2023-03-06 15:15:17 +09:00
Asahi Lina
e49c90a314
m1n1.agx.context: Add GPUMicroSequence.cur_addr()
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This requires that we pre-allocate the buffer
Signed-off-by: Asahi Lina <lina@asahilina.net>
2023-03-06 15:15:17 +09:00
Asahi Lina
586be52ec5
m1n1.trace.agx: Log structure UAT permissions as meta
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Signed-off-by: Asahi Lina <lina@asahilina.net>
2023-03-06 15:15:17 +09:00
Asahi Lina
b4c687ce13
m1n1.hw.uat: Add ioperm()
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Signed-off-by: Asahi Lina <lina@asahilina.net>
2023-03-06 15:15:17 +09:00
Asahi Lina
cc1284f264
hv/trace_agx_defer.py: Exclude context ID 1 (compositor)
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Signed-off-by: Asahi Lina <lina@asahilina.net>
2023-03-06 15:15:17 +09:00
Asahi Lina
9a8da80e8d
m1n1.trace.agx: Add exclude_context_id option
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Signed-off-by: Asahi Lina <lina@asahilina.net>
2023-03-06 15:15:17 +09:00
Asahi Lina
9e93bd70e4
m1n1.fw.agx: More compute and blit stuff
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Signed-off-by: Asahi Lina <lina@asahilina.net>
2023-03-06 15:15:17 +09:00
Asahi Lina
074892377c
m1n1.fw.agx: Fix some more sequence number-ish field names
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Signed-off-by: Asahi Lina <lina@asahilina.net>
2023-03-06 15:15:17 +09:00
Asahi Lina
b7fb8d98d8
m1n1.agx: Increase available VM size and reduce usage
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Signed-off-by: Asahi Lina <lina@asahilina.net>
2023-03-06 15:15:17 +09:00
Asahi Lina
25813d91b4
m1n1.trace.agx: Disable RegionC tracing
...
The atomic stuff breaks with Linux right now...
Signed-off-by: Asahi Lina <lina@asahilina.net>
2023-03-06 15:15:17 +09:00
Asahi Lina
3e572aba4a
m1n1.fw.dcp.ipc: Add compression info struct
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Signed-off-by: Asahi Lina <lina@asahilina.net>
2023-03-06 15:15:17 +09:00
Asahi Lina
813c545509
m1n1.fw.agx: Compute struct fixes for 13.2
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Assuming these apply at 13.0b4 too...
Signed-off-by: Asahi Lina <lina@asahilina.net>
2023-03-06 15:15:17 +09:00
Asahi Lina
f01a62b7a1
m1n1.fw.agx.cmdqueue: Misc fixes
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Signed-off-by: Asahi Lina <lina@asahilina.net>
2023-03-06 15:15:17 +09:00
Asahi Lina
1400b50157
m1n1.fw.agx: Initial 13.2 structure changes
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Signed-off-by: Asahi Lina <lina@asahilina.net>
2023-03-06 15:15:17 +09:00
Asahi Lina
e22d2fe049
m1n1.hw.agx: Fix fault status register fields
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Signed-off-by: Asahi Lina <lina@asahilina.net>
2023-03-06 15:15:17 +09:00
Asahi Lina
e7dee84c3a
m1n1.trace.agx: Misc TA/3D dump changes
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Signed-off-by: Asahi Lina <lina@asahilina.net>
2023-03-06 15:15:17 +09:00