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m1n1/src/start.S

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ArmAsm
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Initial commit Signed-off-by: Hector Martin <marcan@marcan.st>
2021-01-12 18:22:11 +00:00
/* SPDX-License-Identifier: MIT */
Configure early debug features by SoC type To build a version with early UART support, set it in config.h Signed-off-by: Hector Martin <marcan@marcan.st>
2021-11-01 04:36:05 +00:00
#include "soc.h"
Remove hardcoded UART/WDT addresses The M1 Pro/Max Macs use a different base address for the UART and the WDT than earlier models. Remove hardcoded base addresses constants and replace them with loads from the ADT. - The base address of the WDT is already retrieved in wdt_disable; also use this address when triggering a reboot. - Retrieve the base address of uart0 in uart_init. If the operation fails, the error will be signaled on the early uart (if not disabled). - The early debug UART can’t use the ADT (or shouldn’t) so it is now disabled by default. To enable it, add -DEARLY_UART -DEARLY_UART_BASE=0xuart_address to the CFLAGS. Signed-off-by: Vincent Duvert <vincent@duvert.net>
2021-10-31 19:25:36 +00:00
Initial commit Signed-off-by: Hector Martin <marcan@marcan.st>
2021-01-12 18:22:11 +00:00
#define UTRSTAT 0x010
#define UTXH 0x020
.extern _start_c
.extern _stack_bot
Basic exceptions, irq, cache mgmt support Signed-off-by: Hector Martin <marcan@marcan.st>
2021-01-16 15:45:10 +00:00
.extern _v_sp0_sync
.extern _v_sp0_irq
.extern _v_sp0_fiq
.extern _v_sp0_serr
Add code to spin up secondary CPUs Signed-off-by: Hector Martin <marcan@marcan.st>
2021-01-28 07:05:24 +00:00
.extern _reset_stack
.extern _cpu_reset_c
Remove hardcoded UART/WDT addresses The M1 Pro/Max Macs use a different base address for the UART and the WDT than earlier models. Remove hardcoded base addresses constants and replace them with loads from the ADT. - The base address of the WDT is already retrieved in wdt_disable; also use this address when triggering a reboot. - Retrieve the base address of uart0 in uart_init. If the operation fails, the error will be signaled on the early uart (if not disabled). - The early debug UART can’t use the ADT (or shouldn’t) so it is now disabled by default. To enable it, add -DEARLY_UART -DEARLY_UART_BASE=0xuart_address to the CFLAGS. Signed-off-by: Vincent Duvert <vincent@duvert.net>
2021-10-31 19:25:36 +00:00
.extern wdt_reboot
Initial commit Signed-off-by: Hector Martin <marcan@marcan.st>
2021-01-12 18:22:11 +00:00
.section .init, "ax"
start.S: clean up some junk Signed-off-by: Hector Martin <marcan@marcan.st>
2021-03-04 12:27:25 +00:00
.align 11
Basic exceptions, irq, cache mgmt support Signed-off-by: Hector Martin <marcan@marcan.st>
2021-01-16 15:45:10 +00:00
.globl _vectors_start
_vectors_start:
mov x9, '0'
Add code to spin up secondary CPUs Signed-off-by: Hector Martin <marcan@marcan.st>
2021-01-28 07:05:24 +00:00
b cpu_reset
Basic exceptions, irq, cache mgmt support Signed-off-by: Hector Martin <marcan@marcan.st>
2021-01-16 15:45:10 +00:00
.align 7
mov x9, '1'
b exc_unk
.align 7
mov x9, '2'
b exc_unk
.align 7
mov x9, '3'
b exc_unk
.align 7
b _v_sp0_sync
.align 7
b _v_sp0_irq
.align 7
b _v_sp0_fiq
.align 7
b _v_sp0_serr
.align 7
exception: implement el0_call to run code as EL0 This lets us test register access and other features from EL0. No serious attempt at security is made, but at least EL0 runs off of a separate stack and can return to EL2 at any time with `brk`; we can easily implement a guard mode to break straight to EL2 on exception later if needed. Signed-off-by: Hector Martin <marcan@marcan.st>
2021-02-24 12:46:33 +00:00
b _v_sp0_sync
Basic exceptions, irq, cache mgmt support Signed-off-by: Hector Martin <marcan@marcan.st>
2021-01-16 15:45:10 +00:00
.align 7
exception: implement el0_call to run code as EL0 This lets us test register access and other features from EL0. No serious attempt at security is made, but at least EL0 runs off of a separate stack and can return to EL2 at any time with `brk`; we can easily implement a guard mode to break straight to EL2 on exception later if needed. Signed-off-by: Hector Martin <marcan@marcan.st>
2021-02-24 12:46:33 +00:00
b _v_sp0_irq
Basic exceptions, irq, cache mgmt support Signed-off-by: Hector Martin <marcan@marcan.st>
2021-01-16 15:45:10 +00:00
.align 7
exception: implement el0_call to run code as EL0 This lets us test register access and other features from EL0. No serious attempt at security is made, but at least EL0 runs off of a separate stack and can return to EL2 at any time with `brk`; we can easily implement a guard mode to break straight to EL2 on exception later if needed. Signed-off-by: Hector Martin <marcan@marcan.st>
2021-02-24 12:46:33 +00:00
b _v_sp0_fiq
Basic exceptions, irq, cache mgmt support Signed-off-by: Hector Martin <marcan@marcan.st>
2021-01-16 15:45:10 +00:00
.align 7
exception: implement el0_call to run code as EL0 This lets us test register access and other features from EL0. No serious attempt at security is made, but at least EL0 runs off of a separate stack and can return to EL2 at any time with `brk`; we can easily implement a guard mode to break straight to EL2 on exception later if needed. Signed-off-by: Hector Martin <marcan@marcan.st>
2021-02-24 12:46:33 +00:00
b _v_sp0_serr
Basic exceptions, irq, cache mgmt support Signed-off-by: Hector Martin <marcan@marcan.st>
2021-01-16 15:45:10 +00:00
.align 7
mov x9, 'p'
b exc_unk
.align 7
mov x9, 'q'
b exc_unk
.align 7
mov x9, 'r'
b exc_unk
.align 7
mov x9, 's'
b exc_unk
.align 7
Initial commit Signed-off-by: Hector Martin <marcan@marcan.st>
2021-01-12 18:22:11 +00:00
.globl _start
.type _start, @function
_start:
start.S: don't use caller-saved registers accross calls Signed-off-by: Ferdinand Bachmann <theferdi265@gmail.com>
2021-01-17 14:16:58 +00:00
mov x19, x0
Initial commit Signed-off-by: Hector Martin <marcan@marcan.st>
2021-01-12 18:22:11 +00:00
mov w0, 'm'
bl debug_putc
Add code to spin up secondary CPUs Signed-off-by: Hector Martin <marcan@marcan.st>
2021-01-28 07:05:24 +00:00
start.S: probe the stack after init This makes it obvious when the stack is broken. Signed-off-by: Hector Martin <marcan@marcan.st>
2021-01-28 14:32:30 +00:00
adrp x1, _stack_bot
mov sp, x1
Initial commit Signed-off-by: Hector Martin <marcan@marcan.st>
2021-01-12 18:22:11 +00:00
mov w0, '1'
bl debug_putc
start.S: probe the stack after init This makes it obvious when the stack is broken. Signed-off-by: Hector Martin <marcan@marcan.st>
2021-01-28 14:32:30 +00:00
ldr x2, [sp, #-8]
Add code to spin up secondary CPUs Signed-off-by: Hector Martin <marcan@marcan.st>
2021-01-28 07:05:24 +00:00
Initial commit Signed-off-by: Hector Martin <marcan@marcan.st>
2021-01-12 18:22:11 +00:00
mov w0, 'n'
bl debug_putc
adrp x0, _base
start.S: don't use caller-saved registers accross calls Signed-off-by: Ferdinand Bachmann <theferdi265@gmail.com>
2021-01-17 14:16:58 +00:00
mov x20, x0
Initial commit Signed-off-by: Hector Martin <marcan@marcan.st>
2021-01-12 18:22:11 +00:00
adrp x1, _rela_start
add x1, x1, :lo12:_rela_start
adrp x2, _rela_end
add x2, x2, :lo12:_rela_end
bl apply_rela
mov w0, '1'
bl debug_putc
start.S: clang compat, don't use '\r' in asm files Signed-off-by: Ferdinand Bachmann <theferdi265@gmail.com>
2021-01-17 14:17:30 +00:00
mov w0, 0xd /* '\r', clang compat */
Initial commit Signed-off-by: Hector Martin <marcan@marcan.st>
2021-01-12 18:22:11 +00:00
bl debug_putc
mov w0, '\n'
bl debug_putc
Add code to spin up secondary CPUs Signed-off-by: Hector Martin <marcan@marcan.st>
2021-01-28 07:05:24 +00:00
start.S: don't use caller-saved registers accross calls Signed-off-by: Ferdinand Bachmann <theferdi265@gmail.com>
2021-01-17 14:16:58 +00:00
mov x0, x19
mov x1, x20
Initial commit Signed-off-by: Hector Martin <marcan@marcan.st>
2021-01-12 18:22:11 +00:00
bl _start_c
b .
Basic exceptions, irq, cache mgmt support Signed-off-by: Hector Martin <marcan@marcan.st>
2021-01-16 15:45:10 +00:00
.globl exc_unk
.type exc_unk, @function
exc_unk:
start.S: clang compat, don't use '\r' in asm files Signed-off-by: Ferdinand Bachmann <theferdi265@gmail.com>
2021-01-17 14:17:30 +00:00
mov w0, 0xd /* '\r', clang compat */
Basic exceptions, irq, cache mgmt support Signed-off-by: Hector Martin <marcan@marcan.st>
2021-01-16 15:45:10 +00:00
bl debug_putc
mov w0, '\n'
bl debug_putc
mov w0, '!'
bl debug_putc
mov w0, 'E'
bl debug_putc
mov w0, 'x'
bl debug_putc
mov w0, 'C'
bl debug_putc
mov w0, ':'
bl debug_putc
mov w0, w9
bl debug_putc
mov w0, '!'
bl debug_putc
start.S: clang compat, don't use '\r' in asm files Signed-off-by: Ferdinand Bachmann <theferdi265@gmail.com>
2021-01-17 14:17:30 +00:00
mov w0, 0xd /* '\r', clang compat */
Basic exceptions, irq, cache mgmt support Signed-off-by: Hector Martin <marcan@marcan.st>
2021-01-16 15:45:10 +00:00
bl debug_putc
mov w0, '\n'
bl debug_putc
b reboot
Add code to spin up secondary CPUs Signed-off-by: Hector Martin <marcan@marcan.st>
2021-01-28 07:05:24 +00:00
.globl cpu_reset
.type cpu_reset, @function
cpu_reset:
mov w0, 'O'
bl debug_putc
adrp x1, _reset_stack
smp: fix totally broken stack setup This worked by accident before... Signed-off-by: Hector Martin <marcan@marcan.st>
2021-01-28 14:47:41 +00:00
add x1, x1, :lo12:_reset_stack
Add code to spin up secondary CPUs Signed-off-by: Hector Martin <marcan@marcan.st>
2021-01-28 07:05:24 +00:00
ldr x1, [x1]
mov sp, x1
start.S: probe the stack after init This makes it obvious when the stack is broken. Signed-off-by: Hector Martin <marcan@marcan.st>
2021-01-28 14:32:30 +00:00
ldr x2, [sp, #-8]
Add code to spin up secondary CPUs Signed-off-by: Hector Martin <marcan@marcan.st>
2021-01-28 07:05:24 +00:00
mov w0, 'K'
bl debug_putc
smp: fix totally broken stack setup This worked by accident before... Signed-off-by: Hector Martin <marcan@marcan.st>
2021-01-28 14:47:41 +00:00
mov x0, sp
Add code to spin up secondary CPUs Signed-off-by: Hector Martin <marcan@marcan.st>
2021-01-28 07:05:24 +00:00
bl _cpu_reset_c
b .
Initial commit Signed-off-by: Hector Martin <marcan@marcan.st>
2021-01-12 18:22:11 +00:00
.globl debug_putc
.type debug_putc, @function
debug_putc:
Configure early debug features by SoC type To build a version with early UART support, set it in config.h Signed-off-by: Hector Martin <marcan@marcan.st>
2021-11-01 04:36:05 +00:00
#ifdef EARLY_UART_BASE
Remove hardcoded UART/WDT addresses The M1 Pro/Max Macs use a different base address for the UART and the WDT than earlier models. Remove hardcoded base addresses constants and replace them with loads from the ADT. - The base address of the WDT is already retrieved in wdt_disable; also use this address when triggering a reboot. - Retrieve the base address of uart0 in uart_init. If the operation fails, the error will be signaled on the early uart (if not disabled). - The early debug UART can’t use the ADT (or shouldn’t) so it is now disabled by default. To enable it, add -DEARLY_UART -DEARLY_UART_BASE=0xuart_address to the CFLAGS. Signed-off-by: Vincent Duvert <vincent@duvert.net>
2021-10-31 19:25:36 +00:00
ldr x1, =EARLY_UART_BASE
Initial commit Signed-off-by: Hector Martin <marcan@marcan.st>
2021-01-12 18:22:11 +00:00
1:
ldr w2, [x1, UTRSTAT]
tst w2, #2
beq 1b
str w0, [x1, UTXH]
Remove hardcoded UART/WDT addresses The M1 Pro/Max Macs use a different base address for the UART and the WDT than earlier models. Remove hardcoded base addresses constants and replace them with loads from the ADT. - The base address of the WDT is already retrieved in wdt_disable; also use this address when triggering a reboot. - Retrieve the base address of uart0 in uart_init. If the operation fails, the error will be signaled on the early uart (if not disabled). - The early debug UART can’t use the ADT (or shouldn’t) so it is now disabled by default. To enable it, add -DEARLY_UART -DEARLY_UART_BASE=0xuart_address to the CFLAGS. Signed-off-by: Vincent Duvert <vincent@duvert.net>
2021-10-31 19:25:36 +00:00
#endif
Initial commit Signed-off-by: Hector Martin <marcan@marcan.st>
2021-01-12 18:22:11 +00:00
ret
Basic exceptions, irq, cache mgmt support Signed-off-by: Hector Martin <marcan@marcan.st>
2021-01-16 15:45:10 +00:00
.globl reboot
.type reboot, @function
reboot:
utils: In EL1, instead of rebooting, break into HV Signed-off-by: Hector Martin <marcan@marcan.st>
2021-05-15 11:42:50 +00:00
mrs x0, CurrentEL
cmp x0, #8
beq 1f
hvc #0
1:
Remove hardcoded UART/WDT addresses The M1 Pro/Max Macs use a different base address for the UART and the WDT than earlier models. Remove hardcoded base addresses constants and replace them with loads from the ADT. - The base address of the WDT is already retrieved in wdt_disable; also use this address when triggering a reboot. - Retrieve the base address of uart0 in uart_init. If the operation fails, the error will be signaled on the early uart (if not disabled). - The early debug UART can’t use the ADT (or shouldn’t) so it is now disabled by default. To enable it, add -DEARLY_UART -DEARLY_UART_BASE=0xuart_address to the CFLAGS. Signed-off-by: Vincent Duvert <vincent@duvert.net>
2021-10-31 19:25:36 +00:00
bl wdt_reboot
Basic exceptions, irq, cache mgmt support Signed-off-by: Hector Martin <marcan@marcan.st>
2021-01-16 15:45:10 +00:00
b .
.pool
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