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bbc1b99e8b
Represent all available RAM in either one or two banks. The first bank describes any RAM below 4GB. The second bank describes any RAM above 4GB. This split is driven by the following requirements: - The NVIDIA L4T kernel requires separate entries in the DT /memory/reg property for memory below and above the 4GB boundary. The layout of that DT property is directly driven by the entries in the U-Boot bank array. - On systems with RAM beyond a physical address of 4GB, the potential existence of a carve-out at the end of RAM below 4GB can only be represented using multiple banks, since usable RAM is not contiguous. While making this change, add a lot more comments re: how and why RAM is represented in banks, and implement a few more "semantic" functions that define (and perhaps later detect at run-time) the size of any carve-out. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
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| .. | ||
| tegra20 | ||
| tegra30 | ||
| tegra114 | ||
| tegra124 | ||
| tegra210 | ||
| ap.c | ||
| board.c | ||
| board2.c | ||
| cache.c | ||
| clock.c | ||
| cmd_enterrcm.c | ||
| cpu.c | ||
| cpu.h | ||
| emc.c | ||
| emc.h | ||
| gpu.c | ||
| Kconfig | ||
| lowlevel_init.S | ||
| Makefile | ||
| pinmux-common.c | ||
| powergate.c | ||
| psci.S | ||
| pwm.c | ||
| spl.c | ||
| sys_info.c | ||
| xusb-padctl.c | ||