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f9b814a8e9
The sys_clk on the dra evm board is 20MHZ. Changing the configuration for the same. And also moving V_SCLK, V_OSCK defines to arch/clock.h for OMAP4+ boards. Signed-off-by: Sricharan R <r.sricharan@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> |
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.. | ||
clock.h | ||
cpu.h | ||
gpio.h | ||
i2c.h | ||
mmc_host_def.h | ||
mux_dra7xx.h | ||
mux_omap5.h | ||
omap.h | ||
spl.h | ||
sys_proto.h |