u-boot/drivers/clk
Philipp Tomsich f4fcba5c5b clk: implement clk_set_defaults()
Linux uses the properties 'assigned-clocks', 'assigned-clock-parents'
and 'assigned-clock-rates' to configure the clock subsystem for use
with various peripheral nodes.

This implements clk_set_defaults() and hooks it up with the general
device probibin in drivers/core/device.c: when a new device is probed,
clk_set_defaults() will be called for it and will process the
properties mentioned above.

Note that this functionality is designed to fail gracefully (i.e. if a
clock-driver does not implement set_parent(), we simply accept this
and ignore the error) as not to break existing board-support.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Tested-by: David Wu <david.wu@rock-chips.com>

Series-changes: 2
- Fixed David's email address.

Series-version: 2

Cover-letter:
clk: support assigned-clock, assigned-clock-parents, assigned-clock-rates

For various peripherals on Rockchip SoCs (e.g. for the Ethernet GMAC),
the parent-clock needs to be set via the DTS.  This adds the required
plumbing and implements the GMAC case for the RK3399.
END
2018-01-28 17:12:36 +01:00
..
aspeed dm: Rename dev_addr..() functions 2017-06-01 07:03:01 -06:00
at91 clk: at91: clk-generated: fix incorrect index of clk source 2017-11-29 22:30:50 -05:00
exynos dm: Rename dev_addr..() functions 2017-06-01 07:03:01 -06:00
renesas Merge branch 'rmobile-mx' of git://git.denx.de/u-boot-sh 2018-01-27 18:25:00 -05:00
rockchip rockchip: clk: rk3399: implement set_parent() operation 2018-01-28 17:12:36 +01:00
tegra clock: implement a driver for the Tegra CAR 2016-09-27 09:11:02 -07:00
uniphier clk: uniphier: add NAND controller clock 2017-10-15 22:32:25 +09:00
clk-hsdk-cgu.c ARC: HSDK: CGU: Add 'Hz' when printing clock frequency 2018-01-19 17:59:35 +03:00
clk-uclass.c clk: implement clk_set_defaults() 2018-01-28 17:12:36 +01:00
clk_bcm6345.c dm: Rename dev_addr..() functions 2017-06-01 07:03:01 -06:00
clk_boston.c treewide: replace with error() with pr_err() 2017-10-04 11:59:44 -04:00
clk_fixed_rate.c clk: Remove superfluous gd declarations 2018-01-21 10:01:02 -07:00
clk_pic32.c wait_bit: use wait_for_bit_le32 and remove wait_for_bit 2018-01-24 12:03:43 +05:30
clk_sandbox.c clk: sandbox: don't check clk ID against 0 2016-06-24 17:24:35 -04:00
clk_sandbox_test.c clk: convert API to match reset/mailbox style 2016-06-19 17:05:55 -06:00
clk_stm32f.c board: stm32f429-disco: switch to DM STM32 clock driver 2018-01-10 08:05:46 -05:00
clk_stm32h7.c stm32: fix STMicroelectronics copyright 2017-11-06 09:51:01 -05:00
clk_zynq.c dm: clk: Update uclass to support livetree 2017-06-01 07:03:14 -06:00
clk_zynqmp.c clk: zynqmp: Remove unused macros/variables 2017-08-02 09:11:52 +02:00
Kconfig ARC: clk: introduce HSDK CGU clock driver 2017-12-11 11:36:23 +03:00
Makefile clk: Makefile: Sort entries alphabetically 2018-01-21 10:01:02 -07:00