mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-15 09:27:35 +00:00
71d2a5e5ef
Synchronize R-Car device trees with Linux 6.1.7, commit 21e996306a6afaae88295858de0ffb8955173a15 . The following script has been used for the synchronization: $ for i in $(cd arch/arm/dts/ ; ls -1 r8a* | grep -v 'u-boot.dts' ; sed -n '/#include/ s@.*"\(.*\)"@\1@p' $(ls -1 r8a* | grep -v 'u-boot.dts')) ; do if [ -e /linux-2.6/arch/arm64/boot/dts/renesas/$i ] ; then cp /linux-2.6/arch/arm64/boot/dts/renesas/$i arch/arm/dts/ ; elif [ -e /linux-2.6/arch/arm/boot/dts/$i ] ; then cp /linux-2.6/arch/arm/boot/dts/$i arch/arm/dts/ else echo "NOT FOUND: $i" fi done $ git add $( ( cd arch/arm/dts/ ; ls -1 r8a* | grep -v 'u-boot.dts' ; sed -n '/#include/ s@.*"\(.*\)"@\1@p' $(ls -1 r8a* | grep -v 'u-boot.dts')) | tr " " "\n" | sed 's@^@arch/arm/dts/@g' ) Move the include/dt-bindings/{clk,clock}/versaclock.h header used by the renesas boards to match Linux 6.1.y as well. Keep arch/arm/dts/r8a774c0-u-boot.dtsi sdhi3 node as it is now used by the arch/arm/dts/r8a774c0-cat874.dts board. Pick s@spi-flash@flash@ change in arch/arm/dts/r8a779a0-falcon-u-boot.dts from "ARM: dts: Synchronize R-Car V3U DTs with Linux 5.18.3" . Adjust R8A77990 Ebisu CONFIG_SYS_MMC_ENV_DEV from 2 to 0 to reflect the card enumeration in ebisu.dtsi /aliases DT node . Adjust R8A7795 and R8A7796 ULCB CONFIG_SYS_MMC_ENV_DEV from 1 to 0 to reflect the card enumeration in ulcb.dtsi /aliases DT node . Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Signed-off-by: Tam Nguyen <tam.nguyen.xa@renesas.com> # r8a779a0-falcon-u-boot.dts Signed-off-by: Hai Pham <hai.pham.ud@renesas.com> # r8a779a0-falcon-u-boot.dts
81 lines
1.8 KiB
Text
81 lines
1.8 KiB
Text
// SPDX-License-Identifier: GPL-2.0
|
|
/*
|
|
* Copyright 2020, Compass Electronics Group, LLC
|
|
*/
|
|
|
|
/dts-v1/;
|
|
|
|
#include "r8a774a1.dtsi"
|
|
#include "beacon-renesom-som.dtsi"
|
|
#include "beacon-renesom-baseboard.dtsi"
|
|
|
|
/ {
|
|
model = "Beacon EmbeddedWorks RZ/G2M Development Kit";
|
|
compatible = "beacon,beacon-rzg2m", "renesas,r8a774a1";
|
|
|
|
aliases {
|
|
i2c0 = &i2c0;
|
|
i2c1 = &i2c1;
|
|
i2c2 = &i2c2;
|
|
i2c3 = &i2c3;
|
|
i2c4 = &i2c4;
|
|
i2c5 = &i2c5;
|
|
i2c6 = &i2c6;
|
|
i2c7 = &iic_pmic;
|
|
serial0 = &scif2;
|
|
serial1 = &hscif0;
|
|
serial2 = &hscif1;
|
|
serial3 = &scif0;
|
|
serial4 = &hscif2;
|
|
serial5 = &scif5;
|
|
ethernet0 = &avb;
|
|
mmc0 = &sdhi3;
|
|
mmc1 = &sdhi0;
|
|
mmc2 = &sdhi2;
|
|
};
|
|
|
|
chosen {
|
|
stdout-path = "serial0:115200n8";
|
|
};
|
|
|
|
memory@600000000 {
|
|
device_type = "memory";
|
|
reg = <0x6 0x00000000 0x0 0x80000000>;
|
|
};
|
|
};
|
|
|
|
&du {
|
|
pinctrl-0 = <&du_pins>;
|
|
pinctrl-names = "default";
|
|
status = "okay";
|
|
|
|
clocks = <&cpg CPG_MOD 724>,
|
|
<&cpg CPG_MOD 723>,
|
|
<&cpg CPG_MOD 722>,
|
|
<&versaclock5 1>,
|
|
<&x302_clk>,
|
|
<&versaclock5 2>;
|
|
clock-names = "du.0", "du.1", "du.2",
|
|
"dclkin.0", "dclkin.1", "dclkin.2";
|
|
};
|
|
|
|
/* Reference versaclock instead of audio_clk_a */
|
|
&rcar_sound {
|
|
clocks = <&cpg CPG_MOD 1005>,
|
|
<&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
|
|
<&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
|
|
<&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
|
|
<&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
|
|
<&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
|
|
<&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
|
|
<&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
|
|
<&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
|
|
<&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
|
|
<&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
|
|
<&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
|
|
<&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
|
|
<&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
|
|
<&versaclock6_bb 4>, <&audio_clk_b>,
|
|
<&audio_clk_c>,
|
|
<&cpg CPG_CORE R8A774A1_CLK_S0D4>;
|
|
};
|