Shiraz Hashim f28e5c946d SPEAr: Correct SoC ID offset in misc configuration space ... SoC Core ID offset is 0x30 in miscellaneous configuration address space. It was wrongly mentioned as periph2 clk enable. Signed-off-by: Shiraz Hashim <shiraz.hashim@st.com> Signed-off-by: Amit Virdi <amit.virdi@st.com> Acked-by: Stefan Roese <sr@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>		2012-07-07 14:07:42 +02:00
..
asm	SPEAr: Correct SoC ID offset in misc configuration space	2012-07-07 14:07:42 +02:00