mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-30 00:21:06 +00:00
f288d54936
CTL 145, 146, 159, 160 registers are used to configure soc odt on rk3399. These soc odt values are updated from CS0_MR22_VAL and CS1_MR22_VAL and for lpddr4 these values ORed with tsel_rd_select_n. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Signed-off-by: YouMin Chen <cym@rock-chips.com> |
||
---|---|---|
.. | ||
mediatek | ||
rockchip | ||
stm32mp1 | ||
bmips_ram.c | ||
k3-am654-ddrss.c | ||
k3-am654-ddrss.h | ||
Kconfig | ||
Makefile | ||
mpc83xx_sdram.c | ||
ram-uclass.c | ||
sandbox_ram.c | ||
stm32_sdram.c |