mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-12-15 07:43:07 +00:00
35b65dd8ef
Historically, the reset_cpu() function had an `addr` parameter which was
meant to pass in an address of the reset vector location, where the CPU
should reset to. This feature is no longer used anywhere in U-Boot as
all reset_cpu() implementations now ignore the passed value. Generic
code has been added which always calls reset_cpu() with `0` which means
this feature can no longer be used easily anyway.
Over time, many implementations seem to have "misunderstood" the
existence of this parameter as a way to customize/parameterize the reset
(e.g. COLD vs WARM resets). As this is not properly supported, the
code will almost always not do what it is intended to (because all
call-sites just call reset_cpu() with 0).
To avoid confusion and to clean up the codebase from unused left-overs
of the past, remove the `addr` parameter entirely. Code which intends
to support different kinds of resets should be rewritten as a sysreset
driver instead.
This transformation was done with the following coccinelle patch:
@@
expression argvalue;
@@
- reset_cpu(argvalue)
+ reset_cpu()
@@
identifier argname;
type argtype;
@@
- reset_cpu(argtype argname)
+ reset_cpu(void)
{ ... }
Signed-off-by: Harald Seiler <hws@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
132 lines
2.3 KiB
C
132 lines
2.3 KiB
C
// SPDX-License-Identifier: GPL-2.0+
|
|
/**
|
|
* (C) Copyright 2014, Cavium Inc.
|
|
**/
|
|
|
|
#include <common.h>
|
|
#include <cpu_func.h>
|
|
#include <dm.h>
|
|
#include <init.h>
|
|
#include <malloc.h>
|
|
#include <errno.h>
|
|
#include <net.h>
|
|
#include <asm/global_data.h>
|
|
#include <linux/compiler.h>
|
|
|
|
#include <cavium/atf.h>
|
|
#include <asm/armv8/mmu.h>
|
|
|
|
#if !CONFIG_IS_ENABLED(OF_CONTROL)
|
|
#include <dm/platform_data/serial_pl01x.h>
|
|
|
|
static const struct pl01x_serial_plat serial0 = {
|
|
.base = CONFIG_SYS_SERIAL0,
|
|
.type = TYPE_PL011,
|
|
.clock = 0,
|
|
.skip_init = true,
|
|
};
|
|
|
|
U_BOOT_DRVINFO(thunderx_serial0) = {
|
|
.name = "serial_pl01x",
|
|
.plat = &serial0,
|
|
};
|
|
|
|
static const struct pl01x_serial_plat serial1 = {
|
|
.base = CONFIG_SYS_SERIAL1,
|
|
.type = TYPE_PL011,
|
|
.clock = 0,
|
|
.skip_init = true,
|
|
};
|
|
|
|
U_BOOT_DRVINFO(thunderx_serial1) = {
|
|
.name = "serial_pl01x",
|
|
.plat = &serial1,
|
|
};
|
|
#endif
|
|
|
|
DECLARE_GLOBAL_DATA_PTR;
|
|
|
|
static struct mm_region thunderx_mem_map[] = {
|
|
{
|
|
.virt = 0x000000000000UL,
|
|
.phys = 0x000000000000UL,
|
|
.size = 0x40000000000UL,
|
|
.attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | PTE_BLOCK_NON_SHARE,
|
|
}, {
|
|
.virt = 0x800000000000UL,
|
|
.phys = 0x800000000000UL,
|
|
.size = 0x40000000000UL,
|
|
.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
|
|
PTE_BLOCK_NON_SHARE,
|
|
}, {
|
|
.virt = 0x840000000000UL,
|
|
.phys = 0x840000000000UL,
|
|
.size = 0x40000000000UL,
|
|
.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
|
|
PTE_BLOCK_NON_SHARE,
|
|
}, {
|
|
/* List terminator */
|
|
0,
|
|
}
|
|
};
|
|
|
|
struct mm_region *mem_map = thunderx_mem_map;
|
|
|
|
int board_init(void)
|
|
{
|
|
return 0;
|
|
}
|
|
|
|
int timer_init(void)
|
|
{
|
|
return 0;
|
|
}
|
|
|
|
int dram_init(void)
|
|
{
|
|
ssize_t node_count = atf_node_count();
|
|
ssize_t dram_size;
|
|
int node;
|
|
|
|
printf("Initializing\nNodes in system: %zd\n", node_count);
|
|
|
|
gd->ram_size = 0;
|
|
|
|
for (node = 0; node < node_count; node++) {
|
|
dram_size = atf_dram_size(node);
|
|
printf("Node %d: %zd MBytes of DRAM\n", node, dram_size >> 20);
|
|
gd->ram_size += dram_size;
|
|
}
|
|
|
|
gd->ram_size -= MEM_BASE;
|
|
|
|
*(unsigned long *)CPU_RELEASE_ADDR = 0;
|
|
|
|
puts("DRAM size:");
|
|
|
|
return 0;
|
|
}
|
|
|
|
/*
|
|
* Board specific reset that is system reset.
|
|
*/
|
|
void reset_cpu(void)
|
|
{
|
|
}
|
|
|
|
/*
|
|
* Board specific ethernet initialization routine.
|
|
*/
|
|
int board_eth_init(struct bd_info *bis)
|
|
{
|
|
int rc = 0;
|
|
|
|
return rc;
|
|
}
|
|
|
|
#ifdef CONFIG_PCI
|
|
void pci_init_board(void)
|
|
{
|
|
printf("DEBUG: PCI Init TODO *****\n");
|
|
}
|
|
#endif
|