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58c3e62040
LX2160ARDB is an evaluation board that supports LX2160A family SoCs. This patch add base support for this board. Signed-off-by: Wasim Khan <wasim.khan@nxp.com> Signed-off-by: Yogesh Gaur <yogeshnarayan.gaur@nxp.com> Signed-off-by: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com> Signed-off-by: Vabhav Sharma <vabhav.sharma@nxp.com> Signed-off-by: Sriram Dash <sriram.dash@nxp.com> Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com> Signed-off-by: Pankit Garg <pankit.garg@nxp.com> Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com> Signed-off-by: Peng Ma <peng.ma@nxp.com> Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com> Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com> [PK: Sqaush patches from Yinbo Zhu, Peng Ma, Chuanhua Han and re-arrange defconfig] Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
79 lines
2.3 KiB
Text
79 lines
2.3 KiB
Text
Overview
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--------
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The LX2160A Reference Design (RDB) is a high-performance computing,
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evaluation, and development platform that supports the QorIQ LX2160A
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Layerscape Architecture processor and its personalities.
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LX2160A SoC Overview
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--------------------------------------
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For details, please refer arch/arm/cpu/armv8/fsl-layerscape/doc/README.soc
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LX2160ARDB board Overview
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----------------------
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DDR Memory
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Two ports of 72-bits (8-bits ECC) DDR4.
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Each port supports four chip-selects and two DIMM
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connectors. Data rate upto 3.2 GT/s.
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SERDES ports
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Thress serdes controllers (24 lanes)
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Serdes1: Supports two USXGMII connectors, each connected through
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Aquantia AQR107 phy, two 25GbE SFP+ modules connected through an Inphi
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IN112525 phy and one 40 GbE QSFP+ module connected through an Inphi
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CS4223 phy.
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Serdes2: Supports one PCIe x4 (Gen1/2/3/4) connector, four SATA 3.0
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connectors
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Serdes3: Supports one PCIe x8 (Gen1/2/3/4) connector
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eSDHC
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eSDHC1: Supports a SD connector for connecting SD cards
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eSDHC2: Supports 128GB Micron MTFC128GAJAECE-IT eMMC
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Octal SPI (XSPI)
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Supports two 64 MB onbpard octal SPI flash memories, one SPI emulator
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for off-board emulation
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I2C All system devices on I2C1 multiplexed using PCA9547 multiplexer
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Serial Ports
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USB 3.0
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Two high speed USB 3.0 ports. First USB 3.0 port configured as
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Host with Type-A connector, second USB 3.0 port configured as OTG
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with micro-AB connector
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Serial Ports Two UART ports
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Ethernet Two RGMII interfaces
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Debug ARM JTAG support
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Booting Options
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---------------
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a) Flexspi boot
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b) SD boot
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Memory map for Flexspi flash
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----------------------------
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Image Flash Offset
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bl2_flexspi_nor.pbl (RCW+PBI+bl2.pbl) 0x00000000
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fip.bin (bl31 + bl33(u-boot) +
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header for Secure-boot(secure-boot only)) 0x00100000
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Boot firmware Environment 0x00500000
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DDR PHY Firmware (fip_ddr_all.bin) 0x00800000
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DPAA2 MC Firmware 0x00A00000
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DPAA2 DPL 0x00D00000
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DPAA2 DPC 0x00E00000
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Kernel.itb 0x01000000
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Memory map for sd card
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----------------------------
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Image SD card Offset
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bl2_sd.pbl (RCW+PBI+bl2.pbl) 0x00008
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fip.bin (bl31 + bl33(u-boot) +
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header for Secure-boot(secure-boot only)) 0x00800
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Boot firmware Environment 0x02800
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DDR PHY Firmware (fip_ddr_all.bin) 0x04000
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DPAA2 MC Firmware 0x05000
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DPAA2 DPL 0x06800
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DPAA2 DPC 0x07000
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Kernel.itb 0x08000
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