mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-12-18 01:03:05 +00:00
80 lines
2.3 KiB
Text
80 lines
2.3 KiB
Text
|
Overview
|
||
|
|
--------
|
||
|
|
The LX2160A Reference Design (RDB) is a high-performance computing,
|
||
|
|
evaluation, and development platform that supports the QorIQ LX2160A
|
||
|
|
Layerscape Architecture processor and its personalities.
|
||
|
|
|
||
|
|
LX2160A SoC Overview
|
||
|
|
--------------------------------------
|
||
|
|
For details, please refer arch/arm/cpu/armv8/fsl-layerscape/doc/README.soc
|
||
|
|
|
||
|
|
LX2160ARDB board Overview
|
||
|
|
----------------------
|
||
|
|
DDR Memory
|
||
|
|
Two ports of 72-bits (8-bits ECC) DDR4.
|
||
|
|
Each port supports four chip-selects and two DIMM
|
||
|
|
connectors. Data rate upto 3.2 GT/s.
|
||
|
|
|
||
|
|
SERDES ports
|
||
|
|
Thress serdes controllers (24 lanes)
|
||
|
|
Serdes1: Supports two USXGMII connectors, each connected through
|
||
|
|
Aquantia AQR107 phy, two 25GbE SFP+ modules connected through an Inphi
|
||
|
|
IN112525 phy and one 40 GbE QSFP+ module connected through an Inphi
|
||
|
|
CS4223 phy.
|
||
|
|
|
||
|
|
Serdes2: Supports one PCIe x4 (Gen1/2/3/4) connector, four SATA 3.0
|
||
|
|
connectors
|
||
|
|
|
||
|
|
Serdes3: Supports one PCIe x8 (Gen1/2/3/4) connector
|
||
|
|
|
||
|
|
eSDHC
|
||
|
|
eSDHC1: Supports a SD connector for connecting SD cards
|
||
|
|
eSDHC2: Supports 128GB Micron MTFC128GAJAECE-IT eMMC
|
||
|
|
|
||
|
|
Octal SPI (XSPI)
|
||
|
|
Supports two 64 MB onbpard octal SPI flash memories, one SPI emulator
|
||
|
|
for off-board emulation
|
||
|
|
|
||
|
|
I2C All system devices on I2C1 multiplexed using PCA9547 multiplexer
|
||
|
|
Serial Ports
|
||
|
|
|
||
|
|
USB 3.0
|
||
|
|
Two high speed USB 3.0 ports. First USB 3.0 port configured as
|
||
|
|
Host with Type-A connector, second USB 3.0 port configured as OTG
|
||
|
|
with micro-AB connector
|
||
|
|
|
||
|
|
Serial Ports Two UART ports
|
||
|
|
Ethernet Two RGMII interfaces
|
||
|
|
Debug ARM JTAG support
|
||
|
|
|
||
|
|
Booting Options
|
||
|
|
---------------
|
||
|
|
a) Flexspi boot
|
||
|
|
b) SD boot
|
||
|
|
|
||
|
|
Memory map for Flexspi flash
|
||
|
|
----------------------------
|
||
|
|
Image Flash Offset
|
||
|
|
bl2_flexspi_nor.pbl (RCW+PBI+bl2.pbl) 0x00000000
|
||
|
|
fip.bin (bl31 + bl33(u-boot) +
|
||
|
|
header for Secure-boot(secure-boot only)) 0x00100000
|
||
|
|
Boot firmware Environment 0x00500000
|
||
|
|
DDR PHY Firmware (fip_ddr_all.bin) 0x00800000
|
||
|
|
DPAA2 MC Firmware 0x00A00000
|
||
|
|
DPAA2 DPL 0x00D00000
|
||
|
|
DPAA2 DPC 0x00E00000
|
||
|
|
Kernel.itb 0x01000000
|
||
|
|
|
||
|
|
Memory map for sd card
|
||
|
|
----------------------------
|
||
|
|
Image SD card Offset
|
||
|
|
bl2_sd.pbl (RCW+PBI+bl2.pbl) 0x00008
|
||
|
|
fip.bin (bl31 + bl33(u-boot) +
|
||
|
|
header for Secure-boot(secure-boot only)) 0x00800
|
||
|
|
Boot firmware Environment 0x02800
|
||
|
|
DDR PHY Firmware (fip_ddr_all.bin) 0x04000
|
||
|
|
DPAA2 MC Firmware 0x05000
|
||
|
|
DPAA2 DPL 0x06800
|
||
|
|
DPAA2 DPC 0x07000
|
||
|
|
Kernel.itb 0x08000
|