mirror of
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1: - board/altera/common/flash.c:flash_erase(): o allow interrupts befor get_timer() call o check-up each erased sector and avoid unexpected timeouts - board/altera/dk1c20/dk1s10.c:board_early_init_f(): o enclose sevenseg_set() in cpp condition - remove the ASMI configuration for DK1S10_standard_32 (never present) - fix some typed in mistakes in the NIOS documentation 2: - split DK1C20 configuration into several header files: o two new files for each NIOS CPU description o U-Boot related part is remaining in DK1C20.h 3: - split DK1S10 configuration into several header files: o two new files for each NIOS CPU description o U-Boot related part is remaining in DK1S10.h 4: - Add support for the Microtronix Linux Development Kit NIOS CPU configuration at the Altera Nios Development Kit, Stratix Edition (DK-1S10) 5: - Add documentation for the Altera Nios Development Kit, Stratix Edition (DK-1S10) 6: - Add support for the Nios Serial Peripharel Interface (SPI) (master only) 7: - Add support for the common U-Boot SPI framework at RTC driver DS1306 |
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.. | ||
I2C_Edge_Conditions | ||
README-i386 | ||
README.amigaone | ||
README.ARM-memory-map | ||
README.autoboot | ||
README.bedbug | ||
README.cmi | ||
README.commands | ||
README.console | ||
README.db64360 | ||
README.db64460 | ||
README.dk1c20 | ||
README.dk1c20_std32 | ||
README.dk1s10 | ||
README.dk1s10_mldk20 | ||
README.dk1s10_std32 | ||
README.dk1s40_std32 | ||
README.dk20k200_std32 | ||
README.ebony | ||
README.EVB-64260-750CX | ||
README.evb64260 | ||
README.fads | ||
README.idma2intr | ||
README.INCA-IP | ||
README.IPHASE4539 | ||
README.JFFS2 | ||
README.lynxkdi | ||
README.MBX | ||
README.Modem | ||
README.mpc5xx | ||
README.mpc74xx | ||
README.mpc85xxads | ||
README.MPC866 | ||
README.nand | ||
README.nios | ||
README.nios_CFG_NIOS_CPU | ||
README.nios_DK | ||
README.OXC | ||
README.PIP405 | ||
README.POST | ||
README.ppc440 | ||
README.Purple | ||
README.RPXClassic | ||
README.RPXlite | ||
README.Sandpoint8240 | ||
README.sched | ||
README.silent | ||
README.standalone | ||
README.TQM8260 | ||
README.usb | ||
README.video | ||
README.xpedite1k | ||
TODO-i386 |
XES XPedite1000 Board Last Update: December 29, 2003 ======================================================================= This file contains some handy info regarding U-Boot and the XES XPedite1000 PPC440GX PrPMC board. See the README.ppc440 for additional information. SWITCH SETTINGS & JUMPERS ========================== Jumpers selected for AMD29LV040B flash part as the boot flash. I2C Strap EEPROM & Environment Settings ======================================= The XPedite1000 uses a single I2C eeprom for the 440 strappings and for the environment variables. The first page (256 bytes) contains the strappings and the 2 EMAC HW Ethernet addresses. Be careful not to change the 1st page of the EEPROM! Unpopulated jumper J560 can get you out of trouble as it disables the strapping read from EEPROM. I2C iprobe ===================== The i2c utilities work and have been tested on Rev B. of the 440GX. See README.ebony for more information about i2c probing with the 440. GETTING OUT OF I2C TROUBLE =========================== (Direct quote from README.ebony) If you're like me ... you may have screwed up your bootstrap serial eeprom ... or worse, your SPD eeprom when experimenting with the i2c commands. If so, here are some ideas on how to get out of trouble: Serial bootstrap eeprom corruption: ----------------------------------- Power down the board and set the following straps: J560 - closed This will select the default sys0 and sys1 settings (the serial eeproms are not used). Then power up the board and fix the serial eeprom using the imm command. Here are the values I currently use: => imd 50 0 10 0000: 85 7d 42 06 07 80 11 00 00 00 00 00 00 00 00 00 .}B............. Once you have the eeproms set correctly change the J560 straps as you desire. PPC440GX Ethernet EMACs ======================= The XES XPedite1000 uses emac 2 & 3 and ignores emac 0 & 1. PHYs are connected only to emac 2 & 3. The HW Ethernet addresses are read from the i2c eeprom and placed in the bd info structure for enet2addr and enet3addr. The ethernet driver senses that enetaddr and enet1addr are 0's and does not use them. As of this writing gigabit ethernet and the TCPIP acceleration hardware is not supported. Flash Support ============= As of this writing, there is support for the 1/2mb boot flash only. User flash is not yet supported. Regards, --Travis <travis.sawyer@sandburst.com>