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e5ca9a7523
This converts the clint driver from the riscv-specific interface to be a DM-based UCLASS_TIMER driver. In addition, the SiFive DDR driver previously implicitly depended on the CLINT to select REGMAP. Unlike Andes's PLMT/PLIC (which AFAIK never have anything pass it a dtb), the SiFive CLINT is part of the device tree passed in by qemu. This device tree doesn't have a clocks or clock-frequency property on clint, so we need to fall back on the timebase-frequency property. Perhaps in the future we can get a clock-frequency property added to the qemu dtb. Unlike with the Andes PLMT, the Sifive CLINT is also an IPI controller. RISCV_SYSCON_CLINT is retained for this purpose. Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Pragnesh Patel <pragnesh.patel@openfive.com> |
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.. | ||
andes_plic.c | ||
andes_plmt.c | ||
asm-offsets.c | ||
boot.c | ||
bootm.c | ||
cache.c | ||
crt0_riscv_efi.S | ||
elf_riscv32_efi.lds | ||
elf_riscv64_efi.lds | ||
fdt_fixup.c | ||
image.c | ||
interrupts.c | ||
Makefile | ||
mkimage_fit_opensbi.sh | ||
reloc_riscv_efi.c | ||
reset.c | ||
sbi.c | ||
sbi_ipi.c | ||
setjmp.S | ||
sifive_clint.c | ||
smp.c | ||
spl.c |