u-boot/arch/arm/mach-socfpga
Marek Vasut 476abb72e0 ARM: socfpga: Clear PL310 early in SPL
On SoCFPGA A10 systems, it can rarely happen that a reboot from Linux
will result in stale data in PL310 L2 cache controller. Even if the L2
cache controller is disabled via the CTRL register CTRL_EN bit, those
data can interfere with operation of devices using DMA, like e.g. the
DWMMC controller. This can in turn cause e.g. SPL to fail reading data
from SD/MMC.

The obvious solution here would be to fully reset the L2 cache controller
via the reset manager MPUMODRST L2 bit, however this causes bus hang even
if executed entirely from L1 I-cache to avoid generating any bus traffic
through the L2 cache controller.

This patch thus configures and enables the L2 cache controller very early
in the SPL boot process, clears the L2 cache and disables the L2 cache
controller again.

The reason for doing it in SPL is because we need to avoid accessing any
of the potentially stale data in the L2 cache, and we are certain any of
the stale data will be below the OCRAM address range. To further reduce
bus traffic during the L2 cache invalidation, we enable L1 I-cache and
run the invalidation code entirely out of the L1 I-cache.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dalon Westergreen <dwesterg@gmail.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Cc: Tien Fong Chee <tien.fong.chee@intel.com>
2019-05-24 00:01:08 +02:00
..
include/mach ARM: socfpga: Pull PL310 clearing into common code 2019-05-24 00:01:08 +02:00
board.c ARM: socfpga: Reorder Arria10 SPL 2018-08-24 12:05:20 +02:00
clock_manager.c ARM: socfpga: clk: Make L4SP and MMC clock calculation Gen5 only 2018-08-13 22:35:42 +02:00
clock_manager_arria10.c ARM: socfpga: Reorder Arria10 SPL 2018-08-24 12:05:20 +02:00
clock_manager_gen5.c SPDX: Convert all of our single license tags to Linux Kernel style 2018-05-07 09:34:12 -04:00
clock_manager_s10.c arm: socfpga: stratix10: Add clock manager driver for Stratix10 SoC 2018-05-18 10:30:47 +02:00
fpga_manager.c SPDX: Convert all of our single license tags to Linux Kernel style 2018-05-07 09:34:12 -04:00
freeze_controller.c SPDX: Convert all of our single license tags to Linux Kernel style 2018-05-07 09:34:12 -04:00
Kconfig arm: socfpga: Re-add support for Aries MCV SoM and MCVEV[KP] board 2019-05-14 19:52:39 +02:00
mailbox_s10.c arm: socfpga: mailbox: Fix off-by-one error on command length checking 2019-04-25 00:00:49 +02:00
Makefile ARM: socfpga: Convert Arria10 to timer framework 2018-08-24 12:05:20 +02:00
misc.c ARM: socfpga: Pull PL310 clearing into common code 2019-05-24 00:01:08 +02:00
misc_arria10.c ARM: socfpga: Add support for selecting bridges in bridge command 2019-04-29 10:08:56 +02:00
misc_gen5.c ARM: socfpga: Remove socfpga_sdram_apply_static_cfg() 2019-04-29 10:33:45 +02:00
misc_s10.c ARM: socfpga: stratix10: Probe FPGA status before bridge enable 2019-05-06 12:44:45 +02:00
mmu-arm64_s10.c arm: socfpga: stratix10: Add MMU support for Stratix10 SoC 2018-07-12 09:22:11 +02:00
pinmux_arria10.c SPDX: Convert all of our single license tags to Linux Kernel style 2018-05-07 09:34:12 -04:00
qts-filter.sh SPDX: Convert a few files that were missed before 2018-05-10 20:38:35 -04:00
reset_manager.c arm: socfpga: stratix10: Add reset manager driver for Stratix10 SoC 2018-05-18 10:30:47 +02:00
reset_manager_arria10.c ARM: socfpga: Zap unused reset code 2018-08-13 22:35:42 +02:00
reset_manager_gen5.c arm: socfpga: remove re-added ad-hoc reset code 2019-05-14 19:52:38 +02:00
reset_manager_s10.c arm: sofcpga: s10: remove unused ad-hoc reset code 2019-05-14 19:52:39 +02:00
scan_manager.c SPDX: Convert all of our single license tags to Linux Kernel style 2018-05-07 09:34:12 -04:00
spl_a10.c ARM: socfpga: Clear PL310 early in SPL 2019-05-24 00:01:08 +02:00
spl_gen5.c ARM: socfpga: Pull PL310 clearing into common code 2019-05-24 00:01:08 +02:00
spl_s10.c arm: socfpga: Move Stratix 10 SDRAM driver to DM 2019-05-06 12:44:17 +02:00
system_manager_gen5.c SPDX: Convert all of our single license tags to Linux Kernel style 2018-05-07 09:34:12 -04:00
system_manager_s10.c arm: socfpga: stratix10: Add pinmux support for Stratix10 SoC 2018-05-18 10:30:48 +02:00
timer.c SPDX: Convert all of our single license tags to Linux Kernel style 2018-05-07 09:34:12 -04:00
timer_s10.c arm: socfpga: stratix10: Add timer support for Stratix10 SoC 2018-07-12 09:22:12 +02:00
wrap_iocsr_config.c SPDX: Convert all of our single license tags to Linux Kernel style 2018-05-07 09:34:12 -04:00
wrap_pinmux_config.c SPDX: Convert all of our single license tags to Linux Kernel style 2018-05-07 09:34:12 -04:00
wrap_pinmux_config_s10.c arm: socfpga: stratix10: Add pinmux support for Stratix10 SoC 2018-05-18 10:30:48 +02:00
wrap_pll_config.c SPDX: Convert all of our single license tags to Linux Kernel style 2018-05-07 09:34:12 -04:00
wrap_pll_config_s10.c arm: socfpga: stratix10: Add clock manager driver for Stratix10 SoC 2018-05-18 10:30:47 +02:00
wrap_sdram_config.c arm: socfpga: make config structs const 2018-11-29 12:45:15 +01:00