mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-12-22 11:13:07 +00:00
e053ccf6ef
This patch adds general board files based on MT7981 SoCs. MT7981 uses one mmc controller for booting from both SD and eMMC, and the pins of mmc controller are also shared with spi controller. So three configs are need for these boot types: 1. mt7981_rfb_defconfig - SPI-NOR and SPI-NAND 2. mt7981_emmc_rfb_defconfig - eMMC only 3. mt7981_sd_rfb_defconfig - SD only Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
139 lines
2.4 KiB
Text
139 lines
2.4 KiB
Text
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (c) 2022 MediaTek Inc.
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* Author: Sam Shih <sam.shih@mediatek.com>
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*/
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/dts-v1/;
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#include "mt7981.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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/ {
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#address-cells = <1>;
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#size-cells = <1>;
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model = "mt7981-rfb";
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compatible = "mediatek,mt7981", "mediatek,mt7981-rfb";
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chosen {
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stdout-path = &uart0;
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tick-timer = &timer0;
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};
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reg_3p3v: regulator-3p3v {
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compatible = "regulator-fixed";
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regulator-name = "fixed-3.3V";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-boot-on;
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regulator-always-on;
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};
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};
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&uart0 {
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status = "okay";
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};
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&uart1 {
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pinctrl-names = "default";
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pinctrl-0 = <&uart1_pins>;
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status = "disabled";
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};
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ð {
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status = "okay";
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mediatek,gmac-id = <0>;
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phy-mode = "sgmii";
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mediatek,switch = "mt7531";
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reset-gpios = <&gpio 39 GPIO_ACTIVE_HIGH>;
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fixed-link {
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speed = <1000>;
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full-duplex;
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};
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};
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&pinctrl {
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spic_pins: spi1-pins-func-1 {
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mux {
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function = "spi";
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groups = "spi1_1";
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};
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};
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uart1_pins: spi1-pins-func-3 {
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mux {
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function = "uart";
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groups = "uart1_2";
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};
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};
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/* pin15 as pwm0 */
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one_pwm_pins: one-pwm-pins {
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mux {
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function = "pwm";
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groups = "pwm0_1";
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};
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};
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/* pin15 as pwm0 and pin14 as pwm1 */
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two_pwm_pins: two-pwm-pins {
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mux {
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function = "pwm";
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groups = "pwm0_1", "pwm1_0";
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};
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};
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/* pin15 as pwm0, pin14 as pwm1, pin7 as pwm2 */
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three_pwm_pins: three-pwm-pins {
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mux {
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function = "pwm";
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groups = "pwm0_1", "pwm1_0", "pwm2";
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};
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};
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mmc0_pins_default: mmc0default {
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mux {
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function = "flash";
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groups = "emmc_45";
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};
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conf-cmd-dat {
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pins = "SPI0_CLK", "SPI0_MOSI", "SPI0_MISO",
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"SPI0_CS", "SPI0_HOLD", "SPI0_WP",
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"SPI1_CLK", "SPI1_MOSI", "SPI1_MISO";
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input-enable;
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drive-strength = <MTK_DRIVE_4mA>;
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bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
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};
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conf-clk {
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pins = "SPI1_CS";
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drive-strength = <MTK_DRIVE_6mA>;
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bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
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};
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conf-rst {
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pins = "PWM0";
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drive-strength = <MTK_DRIVE_4mA>;
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bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
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};
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};
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};
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&pwm {
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pinctrl-names = "default";
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pinctrl-0 = <&two_pwm_pins>;
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status = "okay";
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};
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&watchdog {
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status = "disabled";
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};
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&mmc0 {
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pinctrl-names = "default";
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pinctrl-0 = <&mmc0_pins_default>;
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bus-width = <8>;
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max-frequency = <52000000>;
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cap-mmc-highspeed;
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cap-mmc-hw-reset;
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vmmc-supply = <®_3p3v>;
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non-removable;
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status = "okay";
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};
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