mirror of
https://github.com/AsahiLinux/u-boot
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5764acb261
This RISC-V ACLINT specification [1] defines a set of memory mapped devices which provide inter-processor interrupts (IPI) and timer functionalities for each HART on a multi-HART RISC-V platform. The RISC-V ACLINT specification is defined to be backward compatible with the SiFive CLINT specification, however the device tree binding is a new one. This change updates the sifive clint timer driver to support ACLINT mtimer device, using a per-driver data field to hold the mtimer offset to the base address encoded in the mtimer node. [1] https://github.com/riscv/riscv-aclint/blob/main/riscv-aclint.adoc Signed-off-by: Bin Meng <bmeng@tinylab.org> Reviewed-by: Rick Chen <rick@andestech.com>
49 lines
1.1 KiB
C
49 lines
1.1 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Copyright (C) 2018, Bin Meng <bmeng.cn@gmail.com>
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*/
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#ifndef __CONFIG_H
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#define __CONFIG_H
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#include <linux/sizes.h>
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#define CFG_SYS_SDRAM_BASE 0x80000000
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#define RISCV_MMODE_TIMERBASE 0x2000000
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#define RISCV_MMODE_TIMEROFF 0xbff8
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#define RISCV_MMODE_TIMER_FREQ 1000000
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#define RISCV_SMODE_TIMER_FREQ 1000000
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/* Environment options */
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#define BOOT_TARGET_DEVICES(func) \
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func(QEMU, qemu, na) \
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func(VIRTIO, virtio, 0) \
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func(SCSI, scsi, 0) \
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func(DHCP, dhcp, na)
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#include <config_distro_bootcmd.h>
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#define BOOTENV_DEV_QEMU(devtypeu, devtypel, instance) \
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"bootcmd_qemu=" \
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"if env exists kernel_start; then " \
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"bootm ${kernel_start} - ${fdtcontroladdr};" \
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"fi;\0"
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#define BOOTENV_DEV_NAME_QEMU(devtypeu, devtypel, instance) \
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"qemu "
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#define CFG_EXTRA_ENV_SETTINGS \
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"fdt_high=0xffffffffffffffff\0" \
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"initrd_high=0xffffffffffffffff\0" \
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"kernel_addr_r=0x84000000\0" \
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"kernel_comp_addr_r=0x88000000\0" \
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"kernel_comp_size=0x4000000\0" \
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"fdt_addr_r=0x8c000000\0" \
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"scriptaddr=0x8c100000\0" \
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"pxefile_addr_r=0x8c200000\0" \
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"ramdisk_addr_r=0x8c300000\0" \
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BOOTENV
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#endif /* __CONFIG_H */
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