mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-12-25 04:23:46 +00:00
b5fe523bbc
Sync the device tree files and device tree header files from upstream Linux kernel, as of 2020-01-08. The commit synced to in the sunxi repo 98d25b0b266d Merge branch 'sunxi/dt-for-5.6' into sunxi/for-next which is also part of next-20200108. Changes brought in include: - cleanup of pinmux node names - addition of Security ID, MBUS, CSI, crypto engine, video codec, pmu, and thermal sensor device nodes for both SoCs - addition of deinterlacing engine device node on H3 - cleanup of RTC device node and addition of its clocks - various board cleanups and improvements - removal of pinmux node for GPIO lines - cpufreq / DVFS - HDMI output - UART-based Bluetooth - audio codec - USB ports - new boards Most of the changes don't concern U-boot. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
153 lines
3.1 KiB
Text
153 lines
3.1 KiB
Text
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
|
/*
|
|
* Copyright (C) 2017 Icenowy Zheng <icenowy@aosc.io>
|
|
*
|
|
* Based on sun8i-h3-bananapi-m2-plus.dts, which is:
|
|
* Copyright (C) 2016 Chen-Yu Tsai <wens@csie.org>
|
|
*/
|
|
|
|
/dts-v1/;
|
|
#include "sun8i-h3.dtsi"
|
|
#include "sunxi-common-regulators.dtsi"
|
|
|
|
#include <dt-bindings/gpio/gpio.h>
|
|
#include <dt-bindings/input/input.h>
|
|
|
|
/ {
|
|
model = "Banana Pi BPI-M2-Zero";
|
|
compatible = "sinovoip,bpi-m2-zero", "allwinner,sun8i-h2-plus";
|
|
|
|
aliases {
|
|
serial0 = &uart0;
|
|
serial1 = &uart1;
|
|
};
|
|
|
|
chosen {
|
|
stdout-path = "serial0:115200n8";
|
|
};
|
|
|
|
leds {
|
|
compatible = "gpio-leds";
|
|
|
|
pwr_led {
|
|
label = "bananapi-m2-zero:red:pwr";
|
|
gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>; /* PL10 */
|
|
default-state = "on";
|
|
};
|
|
};
|
|
|
|
gpio_keys {
|
|
compatible = "gpio-keys";
|
|
|
|
sw4 {
|
|
label = "power";
|
|
linux,code = <BTN_0>;
|
|
gpios = <&r_pio 0 3 GPIO_ACTIVE_LOW>;
|
|
};
|
|
};
|
|
|
|
reg_vdd_cpux: vdd-cpux-regulator {
|
|
compatible = "regulator-gpio";
|
|
regulator-name = "vdd-cpux";
|
|
regulator-type = "voltage";
|
|
regulator-boot-on;
|
|
regulator-always-on;
|
|
regulator-min-microvolt = <1100000>;
|
|
regulator-max-microvolt = <1300000>;
|
|
regulator-ramp-delay = <50>; /* 4ms */
|
|
|
|
gpios = <&r_pio 0 1 GPIO_ACTIVE_HIGH>; /* PL1 */
|
|
enable-active-high;
|
|
gpios-states = <0x1>;
|
|
states = <1100000 0>, <1300000 1>;
|
|
};
|
|
|
|
wifi_pwrseq: wifi_pwrseq {
|
|
compatible = "mmc-pwrseq-simple";
|
|
reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */
|
|
clocks = <&rtc 1>;
|
|
clock-names = "ext_clock";
|
|
};
|
|
};
|
|
|
|
&cpu0 {
|
|
cpu-supply = <®_vdd_cpux>;
|
|
};
|
|
|
|
&ehci0 {
|
|
status = "okay";
|
|
};
|
|
|
|
&mmc0 {
|
|
vmmc-supply = <®_vcc3v3>;
|
|
bus-width = <4>;
|
|
/*
|
|
* On the production batch of this board the card detect GPIO is
|
|
* high active (card inserted), although on the early samples it's
|
|
* low active.
|
|
*/
|
|
cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>; /* PF6 */
|
|
status = "okay";
|
|
};
|
|
|
|
&mmc1 {
|
|
vmmc-supply = <®_vcc3v3>;
|
|
vqmmc-supply = <®_vcc3v3>;
|
|
mmc-pwrseq = <&wifi_pwrseq>;
|
|
bus-width = <4>;
|
|
non-removable;
|
|
status = "okay";
|
|
|
|
brcmf: wifi@1 {
|
|
reg = <1>;
|
|
compatible = "brcm,bcm4329-fmac";
|
|
interrupt-parent = <&pio>;
|
|
interrupts = <6 10 IRQ_TYPE_LEVEL_LOW>; /* PG10 / EINT10 */
|
|
interrupt-names = "host-wake";
|
|
};
|
|
};
|
|
|
|
&ohci0 {
|
|
status = "okay";
|
|
};
|
|
|
|
&uart0 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&uart0_pa_pins>;
|
|
status = "okay";
|
|
};
|
|
|
|
&uart1 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&uart1_pins>, <&uart1_rts_cts_pins>;
|
|
uart-has-rtscts;
|
|
status = "okay";
|
|
|
|
bluetooth {
|
|
compatible = "brcm,bcm43438-bt";
|
|
clocks = <&rtc 1>;
|
|
clock-names = "lpo";
|
|
vbat-supply = <®_vcc3v3>;
|
|
vddio-supply = <®_vcc3v3>;
|
|
device-wakeup-gpios = <&pio 6 13 GPIO_ACTIVE_HIGH>; /* PG13 */
|
|
host-wakeup-gpios = <&pio 6 11 GPIO_ACTIVE_HIGH>; /* PG11 */
|
|
shutdown-gpios = <&pio 6 12 GPIO_ACTIVE_HIGH>; /* PG12 */
|
|
};
|
|
|
|
};
|
|
|
|
&usb_otg {
|
|
dr_mode = "otg";
|
|
status = "okay";
|
|
};
|
|
|
|
&usbphy {
|
|
usb0_id_det-gpios = <&r_pio 0 6 GPIO_ACTIVE_HIGH>; /* PL6 */
|
|
/*
|
|
* There're two micro-USB connectors, one is power-only and another is
|
|
* OTG. The Vbus of these two connectors are connected together, so
|
|
* the external USB device will be powered just by the power input
|
|
* from the power-only USB port.
|
|
*/
|
|
status = "okay";
|
|
};
|