mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-12-22 19:23:07 +00:00
0a50b3c97b
Signed-off-by: Wolfgang Denk <wd@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
167 lines
3.5 KiB
C
167 lines
3.5 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Board init file for Dragonboard 820C
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*
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* (C) Copyright 2017 Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
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*/
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#include <cpu_func.h>
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#include <init.h>
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#include <asm/arch/sysmap-apq8096.h>
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#include <env.h>
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#include <asm/cache.h>
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#include <asm/global_data.h>
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#include <linux/arm-smccc.h>
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#include <linux/psci.h>
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#include <common.h>
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#include <dm.h>
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#include <asm/io.h>
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#include <linux/bitops.h>
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#include <asm/psci.h>
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#include <asm/gpio.h>
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DECLARE_GLOBAL_DATA_PTR;
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int dram_init(void)
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{
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gd->ram_size = PHYS_SDRAM_SIZE;
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return 0;
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}
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int dram_init_banksize(void)
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{
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gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
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gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
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gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
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gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE;
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return 0;
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}
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static void sdhci_power_init(void)
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{
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const u32 TLMM_PULL_MASK = 0x3;
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const u32 TLMM_HDRV_MASK = 0x7;
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struct tlmm_cfg {
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u32 bit; /* bit in the register */
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u8 mask; /* mask clk/dat/cmd control */
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u8 val;
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};
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/* bit offsets in the sdc tlmm register */
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enum { SDC1_DATA_HDRV = 0,
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SDC1_CMD_HDRV = 3,
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SDC1_CLK_HDRV = 6,
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SDC1_DATA_PULL = 9,
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SDC1_CMD_PULL = 11,
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SDC1_CLK_PULL = 13,
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SDC1_RCLK_PULL = 15,
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};
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enum { TLMM_PULL_DOWN = 0x1,
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TLMM_PULL_UP = 0x3,
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TLMM_NO_PULL = 0x0,
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};
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enum { TLMM_CUR_VAL_10MA = 0x04,
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TLMM_CUR_VAL_16MA = 0x07,
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};
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int i;
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/* drive strength configs for sdhc pins */
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const struct tlmm_cfg hdrv[] = {
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{ SDC1_CLK_HDRV, TLMM_CUR_VAL_16MA, TLMM_HDRV_MASK, },
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{ SDC1_CMD_HDRV, TLMM_CUR_VAL_10MA, TLMM_HDRV_MASK, },
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{ SDC1_DATA_HDRV, TLMM_CUR_VAL_10MA, TLMM_HDRV_MASK, },
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};
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/* pull configs for sdhc pins */
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const struct tlmm_cfg pull[] = {
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{ SDC1_CLK_PULL, TLMM_NO_PULL, TLMM_PULL_MASK, },
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{ SDC1_CMD_PULL, TLMM_PULL_UP, TLMM_PULL_MASK, },
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{ SDC1_DATA_PULL, TLMM_PULL_UP, TLMM_PULL_MASK, },
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};
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const struct tlmm_cfg rclk[] = {
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{ SDC1_RCLK_PULL, TLMM_PULL_DOWN, TLMM_PULL_MASK,},
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};
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for (i = 0; i < ARRAY_SIZE(hdrv); i++)
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clrsetbits_le32(SDC1_HDRV_PULL_CTL_REG,
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hdrv[i].mask << hdrv[i].bit,
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hdrv[i].val << hdrv[i].bit);
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for (i = 0; i < ARRAY_SIZE(pull); i++)
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clrsetbits_le32(SDC1_HDRV_PULL_CTL_REG,
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pull[i].mask << pull[i].bit,
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pull[i].val << pull[i].bit);
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for (i = 0; i < ARRAY_SIZE(rclk); i++)
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clrsetbits_le32(SDC1_HDRV_PULL_CTL_REG,
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rclk[i].mask << rclk[i].bit,
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rclk[i].val << rclk[i].bit);
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}
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static void show_psci_version(void)
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{
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struct arm_smccc_res res;
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arm_smccc_smc(ARM_PSCI_0_2_FN_PSCI_VERSION, 0, 0, 0, 0, 0, 0, 0, &res);
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printf("PSCI: v%ld.%ld\n",
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PSCI_VERSION_MAJOR(res.a0),
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PSCI_VERSION_MINOR(res.a0));
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}
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int board_init(void)
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{
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sdhci_power_init();
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show_psci_version();
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return 0;
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}
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void reset_cpu(void)
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{
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psci_system_reset();
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}
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/* Check for vol- button - if pressed - stop autoboot */
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int misc_init_r(void)
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{
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struct udevice *pon;
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struct gpio_desc resin;
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int node, ret;
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ret = uclass_get_device_by_name(UCLASS_GPIO, "pm8994_pon@800", &pon);
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if (ret < 0) {
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printf("Failed to find PMIC pon node. Check device tree\n");
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return 0;
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}
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node = fdt_subnode_offset(gd->fdt_blob, dev_of_offset(pon),
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"key_vol_down");
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if (node < 0) {
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printf("Failed to find key_vol_down node. Check device tree\n");
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return 0;
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}
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if (gpio_request_by_name_nodev(offset_to_ofnode(node), "gpios", 0,
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&resin, 0)) {
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printf("Failed to request key_vol_down button.\n");
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return 0;
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}
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if (dm_gpio_get_value(&resin)) {
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env_set("bootdelay", "-1");
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printf("Power button pressed - dropping to console.\n");
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}
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return 0;
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}
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