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14ad6eb264
Rockchip SoCs bootrom design is like this: - First 2KB or 4KB internal memory is for bootrom stack and heap; - Then the first 4-byte suppose to be a TAG like 'RK33'; - The the following memory address end with '0004' is the first instruction load and running by bootrom; Let's use the boot0 hook to reserve the first 4-byte tag for all the Rockchip SoCs. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> [Commit message taken from an older patch by:] Signed-off-by: Kever Yang <kever.yang@rock-chips.com> |
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arc | ||
arm | ||
m68k | ||
microblaze | ||
mips | ||
nds32 | ||
nios2 | ||
powerpc | ||
sandbox | ||
sh | ||
x86 | ||
xtensa | ||
.gitignore | ||
Kconfig |