mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-12-01 17:10:11 +00:00
e4aea57fa7
Pinctrl/pinconf driver for Renesas RZ/N1 (R906G032) SoC. This is quite rudimentary right now, and only supports applying a default pin configuration as specified by the device tree. Signed-off-by: Ralph Siemsen <ralph.siemsen@linaro.org> Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
36 lines
1.4 KiB
Makefile
36 lines
1.4 KiB
Makefile
# SPDX-License-Identifier: GPL-2.0+
|
|
|
|
obj-y += pinctrl-uclass.o
|
|
obj-$(CONFIG_$(SPL_)PINCTRL_GENERIC) += pinctrl-generic.o
|
|
|
|
obj-$(CONFIG_PINCTRL_APPLE) += pinctrl-apple.o
|
|
obj-$(CONFIG_PINCTRL_AT91) += pinctrl-at91.o
|
|
obj-$(CONFIG_PINCTRL_AT91PIO4) += pinctrl-at91-pio4.o
|
|
obj-y += nxp/
|
|
obj-$(CONFIG_$(SPL_)PINCTRL_ROCKCHIP) += rockchip/
|
|
obj-$(CONFIG_ARCH_ASPEED) += aspeed/
|
|
obj-$(CONFIG_ARCH_ATH79) += ath79/
|
|
obj-$(CONFIG_PINCTRL_INTEL) += intel/
|
|
obj-$(CONFIG_ARCH_MTMIPS) += mtmips/
|
|
obj-$(CONFIG_ARCH_NPCM) += nuvoton/
|
|
obj-$(CONFIG_ARCH_RMOBILE) += renesas/
|
|
obj-$(CONFIG_ARCH_RZN1) += renesas/
|
|
obj-$(CONFIG_PINCTRL_SANDBOX) += pinctrl-sandbox.o
|
|
obj-$(CONFIG_PINCTRL_SUNXI) += sunxi/
|
|
obj-$(CONFIG_PINCTRL_UNIPHIER) += uniphier/
|
|
obj-$(CONFIG_PINCTRL_PIC32) += pinctrl_pic32.o
|
|
obj-$(CONFIG_PINCTRL_EXYNOS) += exynos/
|
|
obj-$(CONFIG_PINCTRL_K210) += pinctrl-k210.o
|
|
obj-$(CONFIG_PINCTRL_MESON) += meson/
|
|
obj-$(CONFIG_PINCTRL_MTK) += mediatek/
|
|
obj-$(CONFIG_PINCTRL_MSCC) += mscc/
|
|
obj-$(CONFIG_ARCH_MVEBU) += mvebu/
|
|
obj-$(CONFIG_ARCH_NEXELL) += nexell/
|
|
obj-$(CONFIG_PINCTRL_QE) += pinctrl-qe-io.o
|
|
obj-$(CONFIG_PINCTRL_SINGLE) += pinctrl-single.o
|
|
obj-$(CONFIG_PINCTRL_STI) += pinctrl-sti.o
|
|
obj-$(CONFIG_PINCTRL_STM32) += pinctrl_stm32.o
|
|
obj-$(CONFIG_$(SPL_)PINCTRL_STMFX) += pinctrl-stmfx.o
|
|
obj-y += broadcom/
|
|
obj-$(CONFIG_PINCTRL_ZYNQMP) += pinctrl-zynqmp.o
|
|
obj-$(CONFIG_PINCTRL_STARFIVE) += starfive/
|