u-boot/arch/arm/include/asm/arch-ls102xa
Xiubo Li 660673af4f ARM: ls102xa: Setting device's stream id for SMMUs.
LS1 has 4 SMMUs for address translation of the masters. All the
SMMUs' stream IDs are 8-bit. The address translation depends on the
stream ID of the incoming transaction.
Each master has unique stream ID assigned to it and is configurable
through SCFG registers. The stream ID for the masters is identical
and share the same register field of STREAM ID registers.

Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2014-12-11 09:42:22 -08:00
..
clock.h arm: ls102xa: Add Freescale LS102xA SoC support 2014-09-08 10:30:32 -07:00
config.h ARM: ls102xa: allow all the peripheral access permission as R/W. 2014-12-11 09:42:12 -08:00
fsl_serdes.h arm: ls102xa: Add Freescale LS102xA SoC support 2014-09-08 10:30:32 -07:00
immap_ls102xa.h ls102xa: changing a few targets' configurations. 2014-12-11 09:42:03 -08:00
imx-regs.h arm: ls102xa: Add Freescale LS102xA SoC support 2014-09-08 10:30:32 -07:00
ls102xa_stream_id.h ARM: ls102xa: Setting device's stream id for SMMUs. 2014-12-11 09:42:22 -08:00
ns_access.h ARM: ls102xa: allow all the peripheral access permission as R/W. 2014-12-11 09:42:12 -08:00
spl.h arm: ls102xa: Add SD boot support for LS1021AQDS board 2014-12-11 09:39:22 -08:00