York Sun cb93071bb6 mpc85xx: Base emulator support ... Prepare for emulator support for mpc85xx parts. Disable DDR training and skip wrlvl_cntl_2 and wrlvl_cntl_3 registers. These two registers improve stability but not supported by emulator. Add CONFIG_FSL_TBCLK_EXTRA_DIV for possible adjustment to time base. Signed-off-by: York Sun <yorksun@freescale.com>		2013-08-09 12:41:38 -07:00
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common_timing_params.h	powerpc/8xxx: Enable DDR3 RDIMM support	2010-07-26 13:16:10 -05:00
ctrl_regs.c	mpc85xx: Base emulator support	2013-08-09 12:41:38 -07:00
ddr.h	powerpc/mpc8xxxx: FSL DDR debugger auto run of stored commands	2013-01-30 11:25:14 -06:00
ddr1_dimm_params.c	GCC4.6: Squash warnings in ddr[123]_dimm_params.c	2011-10-27 23:54:00 +02:00
ddr2_dimm_params.c	GCC4.6: Squash warnings in ddr[123]_dimm_params.c	2011-10-27 23:54:00 +02:00
ddr3_dimm_params.c	powerpc/mpc8xxx: Add fine timing support for DDR3	2012-08-23 12:16:55 -05:00
interactive.c	Add GPL-2.0+ SPDX-License-Identifier to source files	2013-07-24 09:44:38 -04:00
lc_common_dimm_params.c	powerpc/mpc8xxx: Allow DDR overclock	2013-05-24 16:54:11 -05:00
main.c	powerpc/mpc8xxx: Allow board file to override DDR address assignment	2013-05-14 16:13:25 -05:00
Makefile	powerpc/8xxx: Add support for interactive DDR programming interface	2011-10-09 17:57:53 -05:00
options.c	Add GPL-2.0+ SPDX-License-Identifier to source files	2013-07-24 09:44:38 -04:00
util.c	8xxx: Change all 8*xx_DDR addresses to 8xxx	2012-11-27 17:45:17 -06:00