mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-09-24 16:32:20 +00:00
ca8a329a1b
This converts the following to Kconfig: CONFIG_SPL_PAD_TO CONFIG_SPL_MAX_SIZE CONFIG_TPL_PAD_TO CONFIG_TPL_MAX_SIZE Note that we need to make TPL_MAX_SIZE be hex, and so move and convert the existing places. Signed-off-by: Tom Rini <trini@konsulko.com>
74 lines
1.9 KiB
C
74 lines
1.9 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Copyright 2020 NXP
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*/
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#ifndef __IMX8ULP_EVK_H
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#define __IMX8ULP_EVK_H
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#include <linux/sizes.h>
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#include <asm/arch/imx-regs.h>
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#define CONFIG_SYS_BOOTM_LEN (SZ_64M)
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#define CONFIG_SYS_MONITOR_LEN (512 * 1024)
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#define CONFIG_SYS_UBOOT_BASE (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)
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#ifdef CONFIG_SPL_BUILD
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#define CONFIG_SPL_STACK 0x22050000
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#define CONFIG_SPL_BSS_START_ADDR 0x22048000
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#define CONFIG_SPL_BSS_MAX_SIZE 0x2000 /* 8 KB */
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#define CONFIG_SYS_SPL_MALLOC_START 0x22040000
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#define CONFIG_SYS_SPL_MALLOC_SIZE 0x8000 /* 32 KB */
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#define CONFIG_MALLOC_F_ADDR 0x22040000
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#define CONFIG_SPL_ABORT_ON_RAW_IMAGE /* For RAW image gives a error info not panic */
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#endif
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/* ENET Config */
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#if defined(CONFIG_FEC_MXC)
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#define PHY_ANEG_TIMEOUT 20000
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#define CONFIG_FEC_MXC_PHYADDR 1
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#endif
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#ifdef CONFIG_DISTRO_DEFAULTS
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#define BOOT_TARGET_DEVICES(func) \
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func(MMC, mmc, 0)
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#include <config_distro_bootcmd.h>
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#else
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#define BOOTENV
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#endif
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/* Initial environment variables */
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#define CONFIG_EXTRA_ENV_SETTINGS \
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BOOTENV \
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"scriptaddr=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
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"kernel_addr_r=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
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"image=Image\0" \
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"console=ttyLP1,115200 earlycon\0" \
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"fdt_addr_r=0x83000000\0" \
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"boot_fit=no\0" \
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"fdtfile=imx8ulp-evk.dtb\0" \
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"initrd_addr=0x83800000\0" \
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"bootm_size=0x10000000\0" \
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"mmcpart=1\0" \
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"mmcroot=/dev/mmcblk2p2 rootwait rw\0" \
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/* Link Definitions */
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#define CONFIG_SYS_INIT_RAM_ADDR 0x80000000
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#define CONFIG_SYS_INIT_RAM_SIZE 0x80000
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#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
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#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
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#define CONFIG_SYS_SDRAM_BASE 0x80000000
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#define PHYS_SDRAM 0x80000000
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#define PHYS_SDRAM_SIZE 0x80000000 /* 2GB DDR */
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/* Using ULP WDOG for reset */
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#define WDOG_BASE_ADDR WDG3_RBASE
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#endif
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