u-boot/arch/riscv/cpu/ax25
Rick Chen ca06444aac riscv: ax25: add SPL support
The U-Boot SPL will boot in M mode and load the FIT image which
include OpenSBI and U-Boot proper images. After loading progress,
it will jump to OpenSBI first and then U-Boot proper which will
run in S mode.

Also remove V5L2_CACHE due to U-Boot SPL code size consideration.
Without this concern, it can be enable manually for performance.

Signed-off-by: Rick Chen <rick@andestech.com>
Cc: KC Lin <kclin@andestech.com>
Cc: Alan Kao <alankao@andestech.com>
2019-12-10 08:23:10 +08:00
..
cache.c common: Move some cache and MMU functions out of common.h 2019-12-02 18:23:55 -05:00
cpu.c common: Move ARM cache operations out of common.h 2019-12-02 18:24:58 -05:00
Kconfig riscv: ax25: add SPL support 2019-12-10 08:23:10 +08:00
Makefile riscv: cache: Implement i/dcache [status, enable, disable] 2018-11-26 13:58:01 +08:00