u-boot/arch/riscv
Rick Chen ca06444aac riscv: ax25: add SPL support
The U-Boot SPL will boot in M mode and load the FIT image which
include OpenSBI and U-Boot proper images. After loading progress,
it will jump to OpenSBI first and then U-Boot proper which will
run in S mode.

Also remove V5L2_CACHE due to U-Boot SPL code size consideration.
Without this concern, it can be enable manually for performance.

Signed-off-by: Rick Chen <rick@andestech.com>
Cc: KC Lin <kclin@andestech.com>
Cc: Alan Kao <alankao@andestech.com>
2019-12-10 08:23:10 +08:00
..
cpu riscv: ax25: add SPL support 2019-12-10 08:23:10 +08:00
dts riscv: dts: Add hifive-unleashed-a00 dts from Linux 2019-12-10 08:23:10 +08:00
include/asm gpio: sifive: add support for DM based gpio driver for FU540-SoC 2019-10-18 09:04:01 +08:00
lib common: Move interrupt functions into a new header 2019-12-02 18:25:00 -05:00
config.mk riscv: qemu: define standalone load address 2019-01-15 09:36:31 +08:00
Kconfig riscv: increase stack size to avoid a stack overflow during distro boot 2019-12-10 08:23:10 +08:00
Makefile riscv: add Kconfig entries for the code model 2018-12-18 09:56:26 +08:00