mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-16 09:48:16 +00:00
c9056653ec
The fence instruction is used to enforce device I/O and memory ordering constraints in RISC-V. It can not be relied on to directly affect the data cache on every CPU. Andes' AX25 does not have a coherence agent. Its fence instruction flushes the data cache and is used to keep data in the system coherent. The implementation of flush_dcache_all in lib/cache.c is therefore specific to the AX25. Move it into the AX25-specific cache.c in cpu/ax25/. This also adds a missing new line between flush_dcache_all and flush_dcache_range in lib/cache.c. Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
71 lines
1.1 KiB
C
71 lines
1.1 KiB
C
// SPDX-License-Identifier: GPL-2.0+
|
|
/*
|
|
* Copyright (C) 2017 Andes Technology Corporation
|
|
* Rick Chen, Andes Technology Corporation <rick@andestech.com>
|
|
*/
|
|
|
|
#include <common.h>
|
|
|
|
void invalidate_icache_all(void)
|
|
{
|
|
asm volatile ("fence.i" ::: "memory");
|
|
}
|
|
|
|
__weak void flush_dcache_all(void)
|
|
{
|
|
}
|
|
|
|
__weak void flush_dcache_range(unsigned long start, unsigned long end)
|
|
{
|
|
}
|
|
|
|
void invalidate_icache_range(unsigned long start, unsigned long end)
|
|
{
|
|
/*
|
|
* RISC-V does not have an instruction for invalidating parts of the
|
|
* instruction cache. Invalidate all of it instead.
|
|
*/
|
|
invalidate_icache_all();
|
|
}
|
|
|
|
__weak void invalidate_dcache_range(unsigned long start, unsigned long end)
|
|
{
|
|
}
|
|
|
|
void cache_flush(void)
|
|
{
|
|
invalidate_icache_all();
|
|
flush_dcache_all();
|
|
}
|
|
|
|
void flush_cache(unsigned long addr, unsigned long size)
|
|
{
|
|
invalidate_icache_all();
|
|
flush_dcache_all();
|
|
}
|
|
|
|
__weak void icache_enable(void)
|
|
{
|
|
}
|
|
|
|
__weak void icache_disable(void)
|
|
{
|
|
}
|
|
|
|
__weak int icache_status(void)
|
|
{
|
|
return 0;
|
|
}
|
|
|
|
__weak void dcache_enable(void)
|
|
{
|
|
}
|
|
|
|
__weak void dcache_disable(void)
|
|
{
|
|
}
|
|
|
|
__weak int dcache_status(void)
|
|
{
|
|
return 0;
|
|
}
|