Lukas Auer c9056653ec riscv: move the AX25-specific implementation of flush_dcache_all ... The fence instruction is used to enforce device I/O and memory ordering constraints in RISC-V. It can not be relied on to directly affect the data cache on every CPU. Andes' AX25 does not have a coherence agent. Its fence instruction flushes the data cache and is used to keep data in the system coherent. The implementation of flush_dcache_all in lib/cache.c is therefore specific to the AX25. Move it into the AX25-specific cache.c in cpu/ax25/. This also adds a missing new line between flush_dcache_all and flush_dcache_range in lib/cache.c. Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>		2019-01-15 09:36:31 +08:00
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asm-offsets.c	riscv: Save boot hart id to the global data	2018-12-18 09:56:27 +08:00
boot.c	SPDX: Convert all of our single license tags to Linux Kernel style	2018-05-07 09:34:12 -04:00
bootm.c	riscv: bootm: Support booting VxWorks	2018-12-31 08:08:51 -05:00
cache.c	riscv: move the AX25-specific implementation of flush_dcache_all	2019-01-15 09:36:31 +08:00
crt0_riscv_efi.S	riscv: efi: Generate Microsoft PE format compliant images	2018-12-02 21:59:36 +01:00
elf_riscv32_efi.lds	SPDX: Convert single license tags to Linux Kernel style	2018-05-29 14:44:21 +08:00
elf_riscv64_efi.lds	SPDX: Convert single license tags to Linux Kernel style	2018-05-29 14:44:21 +08:00
interrupts.c	riscv: clarify error message on undefined exceptions	2019-01-15 09:36:31 +08:00
Makefile	riscv: Implement riscv_get_time() API using rdtime instruction	2018-12-18 09:56:27 +08:00
rdtime.c	riscv: Implement riscv_get_time() API using rdtime instruction	2018-12-18 09:56:27 +08:00
reloc_riscv_efi.c	riscv: Remove unused _relocate arguments	2018-07-19 16:31:37 -04:00
reset.c	riscv: cosmetic: Reword do_reset() printf message.	2018-10-03 17:49:27 +08:00
setjmp.S	riscv: rename CPU_RISCV_32/64 to match architecture names ARCH_RV32I/64I	2018-11-26 13:57:29 +08:00
sifive_clint.c	riscv: Add a SYSCON driver for SiFive's Core Local Interruptor	2018-12-18 09:56:26 +08:00