York Sun c63e137014 powerpc/mpc8xxx: Add memory reset control ... JEDEC spec requires the clocks to be stable before deasserting reset signal for RDIMMs. Clocks start when any chip select is enabled and clock control register is set. This patch also adds the interface to toggle memory reset signal if needed by the boards. Signed-off-by: York Sun <yorksun@freescale.com>		2013-08-09 12:41:39 -07:00
..
corenet_ds.c	powerpc/corenet: Move RCW print to cpu.c	2013-08-09 12:41:38 -07:00
corenet_ds.h	Add GPL-2.0+ SPDX-License-Identifier to source files	2013-07-24 09:44:38 -04:00
ddr.c	powerpc/mpc8xxx: Add memory reset control	2013-08-09 12:41:39 -07:00
eth_hydra.c	Add GPL-2.0+ SPDX-License-Identifier to source files	2013-07-24 09:44:38 -04:00
eth_p4080.c	Add GPL-2.0+ SPDX-License-Identifier to source files	2013-07-24 09:44:38 -04:00
eth_superhydra.c	Add GPL-2.0+ SPDX-License-Identifier to source files	2013-07-24 09:44:38 -04:00
Makefile	Add GPL-2.0+ SPDX-License-Identifier to source files	2013-07-24 09:44:38 -04:00
p3041ds_ddr.c	powerpc: Add P3041DS/P5020DS board support (uses corenet_ds code)	2011-04-27 22:29:04 -05:00
p4080ds_ddr.c	powerpc/85xx: Update fixed DDR3 timing table for P4080DS	2011-04-04 09:24:41 -05:00
p5020ds_ddr.c	powerpc: Add P3041DS/P5020DS board support (uses corenet_ds code)	2011-04-27 22:29:04 -05:00
p5040ds_ddr.c	powerpc/85xx: add support for the Freescale P5040DS Superhydra reference board	2012-11-27 18:28:06 -06:00
pbi.cfg	Add GPL-2.0+ SPDX-License-Identifier to source files	2013-07-24 09:44:38 -04:00
rcw_p2041rdb.cfg	powerpc/p2041: add RCW file for P2041RDB	2013-01-30 11:25:12 -06:00
rcw_p3041ds.cfg	powerpc/CoreNet: add tool to support pbl image build.	2012-08-23 10:24:16 -05:00
rcw_p4080ds.cfg	powerpc/CoreNet: add tool to support pbl image build.	2012-08-23 10:24:16 -05:00
rcw_p5020ds.cfg	powerpc/CoreNet: add tool to support pbl image build.	2012-08-23 10:24:16 -05:00
rcw_p5040ds.cfg	powerpc/p5040: enable PBL tool support	2013-05-24 16:54:12 -05:00