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u-boot/arch/powerpc/cpu/mpc8xxx/ddr
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James Yang c45f5c08b7 powerpc/mpc8xxx: Fix TIMING_CFG_3[EXT_ACTTOPRE] 
The TIMING_CFG_3[EXT_ACTTOPRE] register field is 2 bits wide, but
the mask omitted the LSB.  This patch provides a 2-bit wide mask.

Signed-off-by: James Yang <James.Yang@freescale.com>
Signed-off-by: York Sun <yorksun@freescale.com>
2013-08-09 12:43:32 -07:00
..
common_timing_params.h powerpc/8xxx: Enable DDR3 RDIMM support 2010-07-26 13:16:10 -05:00
ctrl_regs.c powerpc/mpc8xxx: Fix TIMING_CFG_3[EXT_ACTTOPRE] 2013-08-09 12:43:32 -07:00
ddr.h powerpc/mpc8xxx: Add memory reset control 2013-08-09 12:41:39 -07:00
ddr1_dimm_params.c GCC4.6: Squash warnings in ddr[123]_dimm_params.c 2011-10-27 23:54:00 +02:00
ddr2_dimm_params.c GCC4.6: Squash warnings in ddr[123]_dimm_params.c 2011-10-27 23:54:00 +02:00
ddr3_dimm_params.c powerpc/mpc8xxx: Add x4 DDR device support 2013-08-09 12:41:39 -07:00
interactive.c powerpc/mpc8xxx: Add x4 DDR device support 2013-08-09 12:41:39 -07:00
lc_common_dimm_params.c powerpc/mpc8xxx: Allow DDR overclock 2013-05-24 16:54:11 -05:00
main.c powerpc/mpc8xxx: Add memory reset control 2013-08-09 12:41:39 -07:00
Makefile powerpc/8xxx: Add support for interactive DDR programming interface 2011-10-09 17:57:53 -05:00
options.c powerpc/mpc8xxx: Add x4 DDR device support 2013-08-09 12:41:39 -07:00
util.c 8xxx: Change all 8*xx_DDR addresses to 8xxx 2012-11-27 17:45:17 -06:00