Marek Vasut b8a24e07b2 imx8m: ddrphy_utils: Add 3732 MT/s mode ... Add entry for 3732 MT/s mode of operation of the LPDDR4, in which case the DDR PLL has to be configured in 933 MHz mode. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <festevam@denx.de> Cc: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de> Reviewed-by: Fabio Estevam <festevam@denx.de>		2022-04-12 15:36:17 +02:00
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ddr_init.c	imx: ddr: imx8m: Move selfref_en after DDR scrub	2021-01-23 11:30:30 +01:00
ddrphy_csr.c	drivers: ddr: introduce DDR driver for i.MX8M	2019-01-01 14:12:18 +01:00
ddrphy_train.c	drivers: ddr: imx Workaround for i.MX8M DDRPHY rank to rank issue	2020-07-14 15:23:46 +08:00
ddrphy_utils.c	imx8m: ddrphy_utils: Add 3732 MT/s mode	2022-04-12 15:36:17 +02:00
helper.c	common: Drop asm/global_data.h from common header	2021-02-02 15:33:42 -05:00
Kconfig	imx8mp: refine power on imx8mp board	2021-04-08 09:18:29 +02:00
Makefile	driver: ddr: Refine the ddr init driver on imx8m	2019-10-08 16:36:37 +02:00