mirror of
https://github.com/AsahiLinux/u-boot
synced 2025-01-23 18:35:11 +00:00
e6a8c6f5c0
Add pe2201 platform code and the device tree of pe2201 platform board.
The initial support comprises the UART and PCIe.
Signed-off-by: TracyMg_Li <TracyMg_Li@outlook.com>
Changes since v1:
fix space corrupt.
Changes since v2:
switch to bootstd and text environment.
Changes since v3:
add environment variables.
92 lines
1.5 KiB
C
92 lines
1.5 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2023, Phytium Technology Co., Ltd.
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* lixinde <lixinde@phytium.com.cn>
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* weichangzheng <weichangzheng@phytium.com.cn>
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*/
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#include <stdio.h>
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#include <command.h>
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#include <init.h>
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#include <asm/armv8/mmu.h>
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#include <asm/io.h>
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#include <linux/arm-smccc.h>
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#include <scsi.h>
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#include <asm/u-boot.h>
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#include "cpu.h"
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DECLARE_GLOBAL_DATA_PTR;
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int mach_cpu_init(void)
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{
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check_reset();
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return 0;
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}
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int board_early_init_f(void)
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{
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pcie_init();
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return 0;
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}
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int dram_init(void)
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{
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debug("Phytium ddr init\n");
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ddr_init();
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gd->mem_clk = 0;
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gd->ram_size = PHYS_SDRAM_1_SIZE;
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sec_init();
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debug("PBF relocate done\n");
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return 0;
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}
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int dram_init_banksize(void)
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{
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gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
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gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
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return 0;
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}
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int board_init(void)
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{
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return 0;
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}
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void reset_cpu(void)
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{
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struct arm_smccc_res res;
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debug("run in reset cpu\n");
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arm_smccc_smc(0x84000009, 0, 0, 0, 0, 0, 0, 0, &res);
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if (res.a0 != 0)
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panic("reset cpu error, %lx\n", res.a0);
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}
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static struct mm_region pe2201_mem_map[] = {
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{
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.virt = 0x0UL,
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.phys = 0x0UL,
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.size = 0x80000000UL,
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.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | PTE_BLOCK_NON_SHARE | PTE_BLOCK_PXN
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},
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{
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.virt = 0x80000000UL,
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.phys = 0x80000000UL,
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.size = 0x7b000000UL,
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.attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | PTE_BLOCK_NS | PTE_BLOCK_INNER_SHARE
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},
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{
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0,
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}
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};
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struct mm_region *mem_map = pe2201_mem_map;
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int last_stage_init(void)
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{
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return 0;
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}
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