mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-18 10:48:51 +00:00
cdbb0cf8ec
Generic board support assumes a different method of specifying DRAM size on board, also it can be shared among all boards, notably only sh7763rdp board has a custom legacy dram_init(), however the difference is only in printing some additional information, this feature can be removed. Signed-off-by: Vladimir Zapolskiy <vz@mleia.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
||
|---|---|---|
| .. | ||
| Kconfig | ||
| lowlevel_init.S | ||
| MAINTAINERS | ||
| Makefile | ||
| README.sh7785lcr | ||
| rtl8169.h | ||
| rtl8169_mac.c | ||
| selfcheck.c | ||
| sh7785lcr.c | ||
======================================== Renesas Technology R0P7785LC0011RL board ======================================== This board specification: ========================= The R0P7785LC0011RL(board config name:sh7785lcr) has the following device: - SH7785 (SH-4A) - DDR2-SDRAM 512MB - NOR Flash 64MB - 2D Graphic controller - SATA controller - Ethernet controller - USB host/peripheral controller - SD controller - I2C controller - RTC This board has 2 physical memory maps. It can be changed with DIP switch(S2-5). phys address | S2-5 = OFF | S2-5 = ON -------------------------------+---------------+--------------- 0x00000000 - 0x03ffffff(CS0) | NOR Flash | NOR Flash 0x04000000 - 0x05ffffff(CS1) | PLD | PLD 0x06000000 - 0x07ffffff(CS1) | reserved | I2C 0x08000000 - 0x0bffffff(CS2) | USB | DDR SDRAM 0x0c000000 - 0x0fffffff(CS3) | SD | DDR SDRAM 0x10000000 - 0x13ffffff(CS4) | SM107 | SM107 0x14000000 - 0x17ffffff(CS5) | I2C | USB 0x18000000 - 0x1bffffff(CS6) | reserved | SD 0x40000000 - 0x5fffffff | DDR SDRAM | (cannot use) configuration for This board: ============================= You can choose configuration as follows: - make sh7785lcr_config - make sh7785lcr_32bit_config When you use "make sh7785lcr_config", there is build U-Boot for 29-bit address mode. This mode can use 128MB DDR-SDRAM. When you use "make sh7785lcr_32bit_config", there is build U-Boot for 32-bit extended address mode. This mode can use 384MB DDR-SDRAM. And if you run "pmb" command, this mode can use 512MB DDR-SDRAM. * 32-bit extended address mode PMB mapping * a) on start-up virt | phys | size | device -------------+---------------+---------------+--------------- 0x88000000 | 0x48000000 | 384MB | DDR-SDRAM (Cacheable) 0xa0000000 | 0x00000000 | 64MB | NOR Flash 0xa4000000 | 0x04000000 | 16MB | PLD 0xa6000000 | 0x08000000 | 16MB | USB 0xa8000000 | 0x48000000 | 384MB | DDR-SDRAM (Non-cacheable) b) after "pmb" command virt | phys | size | device -------------+---------------+---------------+--------------- 0x80000000 | 0x40000000 | 512MB | DDR-SDRAM (Cacheable) 0xa0000000 | 0x40000000 | 512MB | DDR-SDRAM (Non-cacheable) This board specific command: ============================ This board has the following its specific command: - hwtest - printmac - setmac - pmb (sh7785lcr_32bit_config only) 1. hwtest This is self-check command. This command has the following options: - all : test all hardware - pld : output PLD version - led : turn on LEDs - dipsw : test DIP switch - sm107 : output SM107 version - net : check RTL8110 ID - sata : check SiI3512 ID - net : output PCI slot device ID i.e) => hwtest led turn on LEDs 3, 5, 7, 9 turn on LEDs 4, 6, 8, 10 => hwtest net Ethernet OK 2. printmac This command outputs MAC address of this board. i.e) => printmac MAC = 00:00:87:**:**:** 3. setmac This command writes MAC address of this board. i.e) => setmac 00:00:87:**:**:** 4. pmb This command change PMB for DDR-SDRAM all mapping. However you cannot use NOR Flash and USB Host on U-Boot when you run this command. i.e) => pmb